System-on-Wafer Package Integrating IPDs for PDN Performance

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Solution Overview

Problem

The semiconductor industry faces challenges in achieving high integration density and efficient power distribution in electronic devices due to limitations in packaging techniques, particularly in reducing the distance between integrated passive devices (IPDs) and functional dies, which affects power distribution network (PDN) performance.

Innovation Solution

The implementation of a system-on-wafer (SoW) package that integrates IPDs between a power module and an integrated fan-out (InFO) structure, utilizing a carrier substrate with a release layer and redistribution structures to stack IPDs, enhancing power distribution and current handling capabilities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional packaging techniques are used, then device footprint is reduced, but distance between IPDs and functional dies increases, degrading PDN performance

Engineering Contradiction:
ImprovePDN performanceVSAvoiddistance between IPDs and functional dies
Core Design Contradiction:
ReliabilityVSLength of stationary object

Solution Approach 1:

The patent transitions from planar packaging to three-dimensional stacking architecture. IPDs are positioned in multiple layers above and below functional dies, enabling power distribution networks to extend vertically rather than only horizontally. This dimensional change reduces the effective distance between power sources and functional elements while maintaining compact footprint.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent implements nested packaging where IPD packages are stacked within and around functional die packages. Multiple IPD layers are integrated between functional dies in a nested configuration, allowing power distribution elements to be positioned in close proximity to functional elements through hierarchical nesting of package structures.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Ease of manufacture

If IPDs are positioned farther from functional dies, then packaging is simpler, but power distribution network performance deteriorates

Engineering Contradiction:
Improvepackaging simplicityVSAvoidPDN performance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent segments the power distribution network into multiple independent IPD layers positioned at different heights. Each IPD layer can be manufactured and tested separately before integration, simplifying the manufacturing process while achieving superior PDN performance through the combined effect of multiple closely-spaced power distribution layers.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces carrier substrates and redistribution layers as intermediary structures that facilitate the integration of IPDs with functional dies. These intermediaries enable precise positioning of IPDs close to functional elements while maintaining manufacturing simplicity through standardized interface structures and modular assembly processes.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If integration density is increased, then device functionality is enhanced, but packaging complexity increases

Engineering Contradiction:
Improveintegration densityVSAvoidpackaging complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent designs universal package structures with standardized interfaces, carrier substrates, and redistribution layers that can accommodate different types and configurations of IPDs and functional dies. This universality enables high integration density through mixed-technology stacking while controlling complexity through reusable modular components and standardized assembly procedures.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11183487B2Integrated circuit package and method
Publication Date: 2021.11.23 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11183487B2 patent drawing
  • US11183487B2 patent drawing
  • US11183487B2 patent drawing

AI summary

A packaged semiconductor device including an integrated passive device-containing package component disposed between a power module and an integrated circuit-containing package and a method of forming the same are disclosed. In an embodiment, a device includes a first package component including a first integrated circuit die; a first encapsulant at least partially surrounding the first integrated circuit die; and a redistribution structure on the first encapsulant and coupled to the first integrated circuit die; a second package component bonded to the first package component, the second package component including an integrated passive device; and a second encapsulant at least partially surrounding the integrated passive device; and a power module attached to the first package component through the second package component.