Systematic Encoder for Arbitrary Parity Position Coding
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Solution Overview
Problem
Conventional encoding circuits are unable to efficiently produce codewords with parity symbols at arbitrary positions, which is necessary for advanced communication standards like ATSC mobile/handheld digital television, due to their reliance on fixed blockwise parity arrangements.
Innovation Solution
The method involves determining parity symbols by evaluating a polynomial of a degree no larger than the number of parity symbols, allowing for efficient and quick encoding of codewords with arbitrary parity positions, using a Lagrange polynomial and its derivative, which can be implemented with minimal hardware and storage requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional encoding circuits use fixed blockwise parity arrangements, then the encoding process is simple and efficient, but the circuits cannot produce codewords with arbitrary parity positions required by advanced communication standards
Solution Approach 1:
The patent implements dynamic parity position selection by allowing the encoder to switch between different parity patterns (first, second, third patterns) based on communication conditions. The circuit uses control signals to dynamically reconfigure which parity positions are active, transforming a static encoder into an adaptable one that can meet varying standards requirements without hardware changes
Solution Approach 2:
The encoding circuit is designed to perform multiple functions by supporting three different parity patterns within a single unified architecture. The same encoder core can generate codewords with parity symbols in different positions by receiving different control signals, eliminating the need for separate dedicated circuits for each parity arrangement and achieving multi-functionality
2Adaptability or versatility
If multiple different parity patterns are supported, then adaptability to different communication standards is improved, but the complexity of managing and switching between patterns increases
Solution Approach 1:
The patent pre-establishes three specific parity patterns (first, second, and third patterns) during the circuit design phase, with predetermined parity positions for each pattern. This preliminary configuration allows the encoder to quickly switch between patterns using simple control signals without requiring complex real-time calculations or configurations, simplifying operation while maintaining variety
Data Source
AI summary
An encoder structure for an error correcting code with arbitrary parity positions is presented. The invention is effective for all error correcting codes whose parity check matrix is of the Vandermonde type. In contrast to conventional encoder circuits, the parity symbols produced by this encoder are not restricted to form a block of consecutive parity symbols at the beginning or at the end of a codeword, but may be spread arbitrarily within the codeword. A general structure of the parity check matrix for such a code is found by exploiting the special Vandermonde structure of matrices. From this general parity check matrix, an expression for the evaluation of the parity symbols in terms of a polynomial with limited degree is derived. An efficient hardware implementation of the proposed encoder is suggested.