Systolic Array Block Matching for Motion Compensation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing block matching methods for motion compensation in video processing face inefficiencies due to memory alignment issues and lack of flexibility in supporting various video encoding standards, particularly in software and hardware implementations.
Innovation Solution
A systolic array-based method for performing block matching, which loads target and reference pixel blocks into an array of systolic cells, computes the sum of absolute differences, and selects the reference block with the lowest sum of absolute difference as a motion vector, supporting variable block sizes and flexible search spaces.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If software implementation of block matching is used, then flexibility to support various video encoding standards is improved, but processing speed becomes slow
Solution Approach 1:
The patent replaces the mechanical software processing system with a specialized hardware systolic array system. The systolic array consists of multiple processing elements organized in a grid that can be configured through control logic to support different video encoding standards (MPEG-2, H.264, etc.), thereby maintaining flexibility while achieving high-speed parallel processing of block matching operations.
Solution Approach 2:
The systolic array is designed as a universal hardware architecture that can perform block matching for multiple video encoding standards through reconfigurable control logic. The same physical hardware can be programmed to support MPEG-2, H.264, and other standards, eliminating the need for separate dedicated hardware for each standard while maintaining high processing speed.
2Productivity
If hardware implementation of block matching is used, then processing speed is improved, but flexibility to support various video encoding standards deteriorates
Solution Approach 1:
The patent implements a dynamic reconfigurable systolic array where the control logic can be programmed to adapt to different video encoding standards. The processing elements and their interconnections can be dynamically configured through control signals to match the specific requirements of MPEG-2, H.264, or other standards, allowing the hardware to maintain high speed while being flexible.
3Ease of operation
If non-aligned memory accesses are used to handle arbitrary block positions, then memory alignment requirements are relaxed, but hardware complexity and additional memory access cycles increase
Solution Approach 1:
The patent employs preliminary action by pre-aligning the reference frame data in memory before processing. The system uses aligned memory accesses to load reference block data into the systolic array, eliminating the need for complex non-aligned access logic during the actual block matching operation. This preliminary alignment simplifies the hardware design and reduces memory access cycles during processing.
Data Source
AI summary
Systolic array-based systems and methods for performing block matching in motion compensation. A target pixel block is loaded into a systolic array. A matching sized block of a reference search space is loaded into the array, row by row. A sum of absolute difference (SOAD) is computed for each row and stored. After each row has been loaded, the reference space is incremented to the next column. After the entire reference space has been searched, the reference block with the smallest SOAD is taken as the motion vector for the target pixel block.