Systolic Array Clock Frequency Control for Thermal Management
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Solution Overview
Problem
Machine learning processors, such as systolic array processors, face heat generation issues due to high power consumption from simultaneous operations, limiting their efficiency in performing machine learning tasks.
Innovation Solution
An electronic device with a main processor and a systolic array processor that calculates a switching activity value to dynamically adjust the clock signal frequency based on the switching activity of processing elements, optimizing power usage and managing heat generation by selectively activating and deactivating processing elements across different regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a lot of computing units perform a plurality of operations at the same time in a systolic array processor, then machine learning operations are performed quickly, but power consumption increases and heat generation occurs
Solution Approach 1:
The patent implements dynamic frequency adjustment of the clock signal supplied to processing elements based on real-time switching activity monitoring. The operating frequency is varied adaptively to match the actual computational workload, allowing the system to maintain high productivity when needed while reducing power consumption during lower-demand periods
Solution Approach 2:
The system changes the operating parameters (clock frequency) of the systolic array processor based on measured switching activity. By adjusting the frequency parameter dynamically, the system optimizes the balance between computational speed and power consumption, resolving the contradiction between high productivity and low energy use
2Speed
If the clock signal frequency is increased to improve processing speed, then machine learning operations are performed faster, but heat generation increases
Solution Approach 1:
The patent employs a feedback mechanism where switching activity is continuously monitored and used to adjust the clock frequency. This closed-loop control ensures that the processing speed is optimized without exceeding thermal constraints, as the frequency is dynamically adjusted based on actual operational conditions and power consumption levels
3Use of energy by moving object
If processing elements are deactivated to reduce power consumption, then heat generation is reduced, but processing capability is limited
Solution Approach 1:
The patent activates only the necessary subset of processing elements based on the actual computational requirements of the machine learning task. By applying partial action - activating just enough processing units to handle the current workload - the system reduces power consumption and heat generation while maintaining adequate processing capability
Data Source
AI summary
Disclosed is an electronic device which includes a main processor, and a systolic array processor, and the systolic array processor includes processing elements, a kernel data memory that provides a kernel data set to the processing elements, a data memory that provides an input data set to the processing elements, and a controller that provides commands to the processing elements. The main processor translates source codes associated with the systolic array processor into commands of the systolic array processor, calculates a switching activity value based on the commands, and stores the translated commands and the switching activity value to a machine learning module, which is based on the systolic array processor.