Systolic Array Outer-Product Matrix Multiplication
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Solution Overview
Problem
Current computational architectures face inefficiencies in performing high-speed parallel computations for large-scale matrix multiplications, particularly in convolutions used in neural networks, due to limitations in data processing and accumulation operations.
Innovation Solution
A systolic array of processing elements arranged in a grid, equipped with multipliers and accumulators, performs concurrent multiply and accumulate operations, with synchronization logic loading vectors from memory and transferring data through accumulators for efficient computation and output of outer products of matrices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a systolic array with multiple accumulators per processing element is used, then computation speed and parallelism are improved, but device complexity and power consumption increase
Solution Approach 1:
The systolic array is divided into processing elements arranged in a grid, where each processing element handles specific computations independently. This segmentation enables parallel processing of matrix multiplication operations while maintaining manageable complexity at each node.
Solution Approach 2:
Accumulator logic is extracted from individual processing elements and implemented as shared external resources. This separation allows processing elements to focus on multiplication operations while accumulators handle summation, improving computational efficiency without increasing per-element complexity.
2Productivity
If more accumulators are provided in each processing element, then accumulation operations become faster, but physical size and power consumption increase
Solution Approach 1:
External accumulators serve multiple processing elements simultaneously, acting as shared resources for accumulation operations. This multi-functionality enables fast accumulation across the array without requiring dedicated accumulators in each processing element, reducing overall physical size.
Solution Approach 2:
External RAM structures act as intermediary accumulation resources between processing elements and output. This mediation enables efficient data accumulation and transfer without requiring large on-chip memory in each processing element, reducing power consumption and physical footprint.
3Use of energy by stationary object
If data is transferred through accumulators in external RAM, then power consumption is reduced, but data access time may increase
Solution Approach 1:
The external RAM accumulators are designed to continuously receive and process data from multiple processing elements without idle cycles. This continuous operation maintains high throughput while using energy-efficient external memory, preventing time losses despite the external location of accumulators.
Data Source
AI summary
Computational apparatus includes a systolic array of processing elements, each including a multiplier and first and second accumulators. In each of a sequence of processing cycles, the processing elements perform the following steps concurrently: Each processing element, except in the first row and first column of the array, receives first and second operands from adjacent processing elements in a preceding row and column of the array, respectively, multiplies the first and second operands together to generate a product, and accumulates the product in the first accumulator. In addition, each processing element passes a stored output data value from the second accumulator to a succeeding processing element along a respective column of the array, receives a new output data value from a preceding processing element along the respective column, and stores the new output data value in the second accumulator.