Systolic Array MAC Units with Dynamic Control Circuit
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Solution Overview
Problem
Existing deep learning systems face challenges in achieving fast and power-efficient operations due to the high computational requirements of artificial neural networks, which often result in slow-responsive services in AI applications.
Innovation Solution
A deep learning apparatus with a processor that supports multiple operation modes, including a systolic array with multiplier accumulator (MAC) units, and a control circuit that manages operations and data movements among MAC units to optimize performance based on the selected mode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a systolic array with multiple MAC units is used to perform deep learning operations, then processing speed and computational capability are improved, but power consumption and energy usage increase
Solution Approach 1:
The patent implements dynamic operation modes that allow the systolic array to adaptively switch between different computational configurations. The control circuit dynamically enables or disables specific MAC units and data movement operations based on the current computational requirements, allowing the system to maintain high processing speed when needed while reducing power consumption during less demanding operations.
Solution Approach 2:
The system changes operational parameters by supporting multiple operation modes (systolic mode, SIMD mode, adder tree mode, systolic adder tree mode) that modify how MAC units process data. By adjusting these operational parameters, the system can optimize the balance between processing speed and power consumption for different deep learning workloads.
2Adaptability or versatility
If multiple operation modes are supported to optimize resource utilization, then adaptability and versatility are improved, but device complexity increases
Solution Approach 1:
The control circuit is designed with multi-functionality to manage multiple operation modes through a unified control architecture. Rather than implementing separate control logic for each mode, the control circuit uses a single versatile design that can configure the systolic array for different operational requirements, thereby reducing overall device complexity while maintaining adaptability.
Solution Approach 2:
The control circuit is segmented into functional units that independently manage specific aspects of operation mode control. This segmentation allows each control unit to handle a particular function (such as data movement control, MAC unit enabling, or mode switching) without requiring the entire control circuit to be complex, thus managing versatility while controlling complexity.
3Productivity
If data movement operations are performed among MAC units to enable parallel processing, then productivity is improved, but use of energy increases
Solution Approach 1:
The system performs partial data movement operations by enabling data movement only among the MAC units that are actively needed for the current computation. Rather than moving data across the entire systolic array, the control circuit identifies and activates only the necessary subset of MAC units and their associated data pathways, thereby maintaining parallel processing productivity while reducing the energy consumed by data movement.
Data Source
AI summary
Disclosed is a method and apparatus with deep learning operations. A deep learning apparatus includes a processor, configured to support a plurality of different operation modes, including a systolic array having a plurality of multiplier accumulator (MAC) units, and a control circuit configured to respectively control, for each the plurality of different operation modes, select operations of the plurality of MAC units and data movements among the plurality of MAC units.