T-Shaped Gate Electrode Fabrication Using Selective Dielectric Etching
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Solution Overview
Problem
Conventional methods for forming T-shaped gate electrodes in high-speed transistors are prone to mechanical instability, yield loss, non-uniform gate length, parasitic capacitance, and photoresist adhesion issues, particularly at sub-100 nm scales, due to high aspect ratios and sensitivity to processing steps like oxygen ash and chemical recess etching.
Innovation Solution
A method using dielectric layers with different etch rates, where the middle dielectric layer is selectively removed by a distinct etchant stopping at the lower layer, providing mechanical support and reducing parasitic capacitance, while the dielectric films act as a passivation layer and enhance adhesion, ensuring stable and high-yield T-gate formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional electron beam or chemical photolithographic processing methods are used to form sub 100 nm T-gates, then the gate channel length can be reduced to increase operating frequency, but the mechanical stability of the T-gate becomes weak due to high aspect ratio
Solution Approach 1:
The patent uses a composite structure consisting of a T-shaped gate electrode combined with dielectric layers (first dielectric layer 14, second dielectric layer 16, and third dielectric layer 18). The dielectric layers provide mechanical support to the high aspect ratio T-gate structure, preventing collapse while maintaining the short gate channel length needed for high operating frequency. This composite approach resolves the contradiction between achieving short gate lengths for high speed and maintaining structural stability.
2Ease of manufacture
If the oxygen ash process is used to remove residual photoresist after development, then the photoresist is cleanly removed, but the oxygen process may also etch off the photoresist that is patterned to form the T-gate, causing non-uniform gate length
Solution Approach 1:
The patent introduces dielectric layers as intermediary protective structures. The first dielectric layer 14 is positioned to protect the gate length region during oxygen ash processing. This intermediary layer allows complete photoresist removal via oxygen plasma while preventing etching of the patterned photoresist that defines the T-gate dimensions, thus maintaining gate length uniformity while achieving clean photoresist removal.
Solution Approach 2:
The dielectric layers are deposited beforehand to provide protective cushioning during subsequent oxygen ash processing. This pre-established protective structure prevents damage to the photoresist pattern and ensures uniform gate length formation while allowing complete removal of residual photoresist.
3Ease of manufacture
If conventional T-gate formation process is used, then the T-gate structure is formed, but subsequent processing may damage the exposed area between gate metal and source/drain metals and leave residues
Solution Approach 1:
The dielectric layers serve multiple functions: they provide mechanical support to the T-gate structure, protect the semiconductor surface during subsequent processing, prevent residue formation, and maintain mechanical stability. This multi-functional approach resolves the contradiction between achieving T-gate formation and preventing damage to exposed areas and residue accumulation during subsequent processing steps.
4Ease of manufacture
If electron-beam photoresist is used to form T-gates, then the photoresist can be patterned, but the photoresist has poor film adhesion to substrate causing peeling off during processing
Solution Approach 1:
The patent uses dielectric layers as intermediary adhesion-enhancing structures. The first dielectric layer 14 provides a stable base that improves adhesion for subsequent photoresist layers. This intermediary layer resolves the poor adhesion between electron-beam photoresist and the substrate, preventing peeling during processing while maintaining the ability to pattern the photoresist for T-gate formation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a stable, high-yield sub-100 nm T-gate process with improved mechanical stability and reduced parasitic capacitance, protecting the semiconductor surface and allowing for easy removal of photoresist residues, enhancing the manufacturing compatibility and performance of high-speed transistors.
Implementation Method 1
exposing a first dielectric layer to a first etchant to selectively remove the first dielectric layer, the etchant stopping at a second dielectric layer
Implementation Method 2
exposing the third dielectric layer to a second etchant different from the first etchant to selectively remove the third dielectric layer, the second etchant stopping at the second dielectric layer
Implementation Method 3
the different etchant stopping at, or in, the lower one of three dielectric layers... providing mechanical support and reducing parasitic capacitance
Data Source
Figure 1A~1C
Figure 1D~1F
Figure 2A~2B
AI summary
A semiconductor structure having a T-shaped electrode. The electrode has a top portion and a narrower stem portion extending from the top portion to a surface of a substrate. A solid dielectric layer has side portions juxtaposed and abutting sidewalls of a lower portion of the stem of electrode. A bottom surface of the top portion is spaced from an upper surface portion by a non-solid dielectric, such as air.