T-Shaped Gate Structure for Submillimeter-Wave RF Performance
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Solution Overview
Problem
Existing T-gate structures in high-frequency applications face challenges in reducing series resistance and capacitance, particularly in mass production and sub-millimeter wave or THz monolithic microwave integrated circuit applications, due to limitations in photoresist layer thickness and electron-beam lithography methods.
Innovation Solution
A T-shaped gate structure with a stem height of 250 nm and gate length of 60 nm is fabricated using a three-layer photoresist process and electron-beam lithography, where the photoresist layers are thickened by reducing the spin coating rotation rate, and a conductive material is deposited in a recess to form a high-gate-stem structure with a narrow gate-to-channel distance, reducing parasitic resistance and capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the gate length is reduced for short channel devices, then the frequency performance is improved, but the series resistance increases
Solution Approach 1:
The gate structure transitions from a planar two-dimensional configuration to a three-dimensional T-shaped configuration by adding a vertical stem portion extending into the recess. This dimensional change allows the gate to maintain electrical connection with the channel while reducing the lateral footprint, thereby improving frequency performance without sacrificing conductance.
Solution Approach 2:
The gate is segmented into two distinct functional portions: a stem portion that contacts the channel layer and provides electrical connection, and a head portion that extends laterally to provide low resistance path. This segmentation allows each portion to be optimized independently for its specific function.
2Manufacturing precision
If a thin photoresist layer is used for small gate length, then fine pattern is obtained, but the gate stem height is reduced
Solution Approach 1:
The photoresist system is segmented into multiple layers with different functions: a thin first photoresist layer for achieving fine pattern precision, and thicker second and third photoresist layers for providing sufficient total thickness to form the desired gate stem height. This segmentation allows independent optimization of pattern precision and stem height.
Solution Approach 2:
Multiple photoresist layers are stacked in a nested configuration where the first photoresist layer is positioned at the bottom, followed by the second and third layers. This nested structure allows the thin first layer to define the precise gate pattern while the combined thickness of all layers provides the necessary stem height.
3Reliability
If a complete gate technique with sub-50 nm two-step recess is performed, then T-gate collapse is avoided and high performance is achieved, but the process complexity increases for mass production
Solution Approach 1:
A single recess structure is formed in advance before gate deposition, providing pre-defined structural support that prevents T-gate collapse during subsequent processing steps. This preliminary action eliminates the need for complex two-step recess procedures while maintaining gate stability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The high-gate-stem structure achieves reduced parasitic delay, improved channel aspect ratio, and enhanced DC and RF performance, with increased transconductance and frequency performance up to 710 GHz, suitable for submillimeter-wave applications.
Implementation Method 1
a layer of first photoresist is formed on the substrate and thickened. A layer of second photoresist and a layer of third photoresist are formed in order on the layer of the first photoresist
Implementation Method 2
the layer of the first photoresist, the layer of the second photoresist and the layer of the third photoresist are patterned to form a recess. Preferably, the step of patterning the layer of the first photoresist, the layer of the second photoresist and the layer of the third photoresist to form the recess is performed by an electron-beam lithography method
Implementation Method 3
a step of depositing a conductive material in the recess is followed
Data Source
AI summary
The present invention discloses a gate structure, which is applied for an electronic component comprising a substrate and an active region defined thereon, and such the gate structure is disposed in the active region and is a T-shaped gate having a stem with a height of 250 nm. Preferably, the gate structure has a gate length of 60 nm.


