T-Shaped Bonding Pad Structure for Reliable Semiconductor Stacking

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Solution Overview

Problem

The reliability of connection structures in stacked semiconductor packages is insufficient, leading to reduced performance due to peeling phenomena between bonding pads and pad seed layers.

Innovation Solution

A semiconductor chip design featuring a through electrode with a 'T' shaped bonding pad and a conformally formed pad seed layer, increasing the contact area and reducing peeling, thereby enhancing structural reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional bonding pad structure is used in stacked semiconductor packages, then the device complexity is reduced, but the reliability of the connection structure deteriorates due to peeling phenomena

Engineering Contradiction:
Improveconnection structure reliabilityVSAvoidbonding pad structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The bonding pad structure transitions from a conventional planar configuration to a three-dimensional T-shaped configuration. The bonding pad extends vertically along the through electrode and horizontally at the top surface, creating multiple contact areas. This dimensional change increases the bonding interface area between the bonding pad and pad seed layer, thereby improving connection reliability and reducing peeling phenomena in stacked semiconductor packages.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The bonding pad is divided into multiple segments: a vertical portion extending along the through electrode and horizontal portions at the top surface. This segmentation allows the bonding pad to establish multiple contact points with the pad seed layer, distributing mechanical stress and enhancing overall connection reliability while maintaining manageable structural complexity.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the contact area between bonding pad and pad seed layer is increased, then the structural reliability is improved, but the manufacturing precision requirements increase

Engineering Contradiction:
Improvestructural reliabilityVSAvoidbonding pad alignment precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The through electrode is formed first, establishing a vertical reference structure. The bonding pad is then configured to extend along this pre-formed through electrode, using it as a alignment guide. This preliminary action of forming the through electrode provides a natural reference for bonding pad placement, reducing the need for high-precision independent alignment and simplifying the manufacturing process while still achieving increased contact area.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11824023B2Semiconductor chip and semiconductor package including the same
Publication Date: 2023.11.21 SAMSUNG ELECTRONICS CO LTD
  • US11824023B2 patent drawing
  • US11824023B2 patent drawing
  • US11824023B2 patent drawing

AI summary

A semiconductor chip includes a semiconductor substrate having a first surface and a second surface opposite to the first surface. An active layer is disposed in a portion of the semiconductor substrate adjacent to the first surface. A through electrode extends in the semiconductor substrate in a vertical direction. The through electrode has a lower surface connected to the active layer and an upper surface positioned at a level lower than a level of the second surface of the semiconductor substrate. A passivation layer is disposed on the second surface of the semiconductor substrate. A bonding pad is arranged on a portion of the passivation layer and the upper surface of the through electrode. The bonding pad has a cross-section with a “T” shape in the vertical direction. The bonding pad is connected to the through electrode.