T-Shaped Gate Electrode Fabrication for Lower Resistance
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Solution Overview
Problem
The existing method for manufacturing semiconductor devices with T-shaped gate electrodes, as disclosed in Patent Literature 1, restricts the ability to set the height and width of the gate electrode to a given length or greater, thereby limiting the reduction of gate electrode resistance.
Innovation Solution
A method involving the formation of a first insulating film with a specific opening, a resist with a larger opening, and subsequent etching and metal layer deposition techniques to create a gate electrode that contacts the semiconductor substrate, allowing for increased width and reduced resistance, including the use of oblique-incidence ion milling and electron beam vapor deposition methods.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the lift-off method is used to form the gate electrode, then the manufacturing process is simple, but the height and width of the gate electrode cannot be set to a given length or greater, limiting resistance reduction
Solution Approach 1:
The gate electrode formation process is divided into multiple stages: first forming a preliminary gate structure using the lift-off method, then performing a second etching process to achieve the final T-shaped structure with controlled dimensions. This segmentation allows precise control over both height and width while maintaining manufacturing feasibility.
Solution Approach 2:
The method performs preliminary formation of the gate electrode structure followed by additional etching to achieve the final dimensions. The first etching process creates an initial structure that serves as a foundation, and the second etching process refines it to the target height and width, enabling precise dimensional control.
2Reliability
If the gate electrode height and width are increased to reduce resistance, then the high frequency characteristics improve, but the lift-off method cannot accommodate dimensions of a given length or greater
Solution Approach 1:
The method employs a dynamic, two-stage etching process that allows the gate electrode dimensions to be adjusted and optimized. The first etching creates a preliminary structure, and the second etching refines the dimensions to achieve the desired height and width for optimal resistance and high frequency characteristics.
Solution Approach 2:
The invention changes the etching parameters and process conditions between the first and second etching steps to achieve different dimensional outcomes. By controlling etching time, power, and gas flow rates differently in each stage, the method achieves precise control over the final gate electrode height and width.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables the fabrication of semiconductor devices with gate electrodes having significantly reduced resistance, improving high-frequency characteristics by allowing for controlled height and width adjustments beyond the limitations of the lift-off method.
Implementation Method 1
a step of etching the gate electrode and up to the middle of the first resist, using the second resist as a mask
Implementation Method 2
including the use of oblique-incidence ion milling and electron beam vapor deposition methods
Data Source
AI summary
A method for manufacturing a semiconductor device includes forming a first insulating film including a first opening; forming, on the first insulating film, a first resist including a second opening larger than the first opening; forming a gate electrode in the first opening, in the second opening, above the second opening, and on the first resist; forming a second resist on the gate electrode, the second resist covering at least a region above the second opening in the vertical direction, the second resist being wider than the second opening; etching the gate electrode and up to the middle of the first resist using the second resist as a mask; removing the first resist and the second resist; and forming a second insulating film covering an exposed portion of the gate electrode and an exposed portion of the first insulating film.