Ta-Nb Barrier Layer BCC Structure for Low Resistance Interconnects

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Solution Overview

Problem

Ta-based barrier films in semiconductor interconnects exhibit high resistivity due to their non-conformal deposition and metastable tetragonal crystal structure, contributing significantly to via and line resistance, and existing solutions require expensive equipment and complex process control.

Innovation Solution

Modifying the crystal structure of Ta-based films to a body-centered cubic (BCC) structure through alloying with elements like V, Cr, Fe, Nb, Mo, or W, which reduces resistivity without altering equipment or process control, and using Ta-Nb alloys with a BCC structure to stabilize the low-resistance phase.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If Ta-based barrier films are deposited using conventional PVD methods, then the barrier function is achieved, but the resistivity becomes high due to non-conformal deposition and metastable tetragonal crystal structure

Engineering Contradiction:
Improvebarrier functionVSAvoidresistivity
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent changes the crystal structure parameter from metastable tetragonal to stable body-centered cubic (BCC) phase through controlled deposition conditions and alloying, which fundamentally alters the electrical resistivity from high to low while maintaining the barrier function

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses Ta-Nb alloy composite materials where niobium stabilizes the BCC crystal structure, creating a composite barrier layer that combines the excellent barrier properties of Ta with the low-resistance BCC phase stability of Nb

Inventive Principle:
Principle #40Composite materials

2Object-affected harmful factors

If existing solutions are used to reduce resistivity, then resistance decreases, but expensive equipment and complex process control are required

Engineering Contradiction:
ImproveresistanceVSAvoidequipment and process control
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent replaces expensive specialized equipment with standard PVD deposition tools, using a simpler, more widely available process that achieves the same resistivity reduction without requiring complex additional hardware

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The patent enables the deposition process to self-stabilize the BCC crystal structure through inherent material properties and process parameters, eliminating the need for complex external process control systems

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The BCC structure significantly lowers the resistivity of the barrier films, reducing via and line resistance by up to 70% without the need for expensive hardware or complex process modifications, enhancing the performance of semiconductor interconnects.

Implementation Method 1

Modifying the crystal structure of Ta-based films to a body-centered cubic (BCC) structure through alloying with elements like V, Cr, Fe, Nb, Mo, or W

Methodology Applied
Scientific EffectCrystal structure transformation: Phase Change

Implementation Method 2

PVD sputtering is often used to deposit these Ta-based barrier films

Methodology Applied
Scientific EffectPhysical vapor deposition: Physical Vapour Deposition

Implementation Method 3

PVD sputtering is often used to deposit these Ta-based barrier films

Methodology Applied
Scientific EffectSputtering: Sputtering

Data Source

PatentUS10446439B2Low resistance interconnect
Publication Date: 2019.10.15 TAHOE RES LTD
  • US10446439B2 patent drawing
  • US10446439B2 patent drawing
  • US10446439B2 patent drawing

AI summary

An embodiment includes an apparatus comprising: a transistor formed on a substrate; and a metal interconnect formed in a dielectric layer above the transistor, wherein: the interconnect comprises a copper layer and a barrier layer that separates the copper layer from the dielectric layer, and the barrier layer comprises tantalum and niobium. Other embodiments are described herein.