TAF-DPS Vernier Caliper Circuit for High-Resolution TOF Measurement

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Solution Overview

Problem

Time-of-Flight (TOF) measurements using traditional Time-to-Digital Converters (TDCs) face challenges in achieving high accuracy due to limitations in delay value precision, especially under varying process, voltage, and temperature conditions, and are not suitable for absolute TOF measurements.

Innovation Solution

The implementation of Time-Average-Frequency Direct Period Synthesis (TAF-DPS) to generate two clock signals with highly tunable frequencies, employing a Vernier method with oscillators of slightly different frequencies to improve measurement resolution.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If traditional Time-to-Digital Converters (TDCs) are used for TOF measurement, then the measurement can be implemented, but the measurement precision is limited due to delay value precision constraints under varying PVT conditions

Engineering Contradiction:
ImproveTOF measurement accuracyVSAvoiddelay value stability under PVT variations
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent changes the fundamental measurement parameter from time delay to frequency ratio. By measuring the ratio of frequencies between a reference oscillator and measurement oscillator over multiple cycles, the system achieves high TOF measurement precision while being insensitive to PVT variations. The frequency ratio method transforms the measurement from a single-cycle time domain operation to a multi-cycle frequency domain operation, thereby improving both precision and reliability.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If delay lines with precise delay values are used to improve TOF measurement accuracy, then measurement precision improves, but the device complexity increases due to need for PLL or DLL locking

Engineering Contradiction:
ImproveTOF measurement accuracyVSAvoidcircuit complexity for delay line locking
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts and removes the complex PLL/DLL locking circuitry from the measurement system. By using frequency ratio measurement with simple oscillators and counters, the invention achieves high measurement precision without requiring complex delay line locking mechanisms. The solution takes out the unnecessary complexity while retaining the essential measurement function.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent substitutes the mechanical/time-domain delay line system with an electrical/frequency-domain oscillator system. Instead of using physical delay lines that require mechanical adjustment and locking, the invention uses frequency division and ratio measurement, replacing complex time-delay mechanisms with simpler frequency-based measurement.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Ease of operation

If TDC is used for relative phase detection, then the operation is simple, but absolute TOF measurement accuracy is difficult to achieve

Engineering Contradiction:
Improvephase detection simplicityVSAvoidabsolute TOF measurement accuracy
Core Design Contradiction:
Ease of operationVSMeasurement precision

Solution Approach 1:

The patent employs periodic action by measuring the frequency ratio over multiple oscillation cycles rather than a single cycle. This periodic measurement approach allows the system to maintain operational simplicity while achieving high absolute TOF measurement accuracy. By accumulating measurements over multiple periods, the system improves precision without complicating the basic measurement operation.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS9379714B1Circuits and methods of TAF-DPS vernier caliper for time-of-flight measurement
Publication Date: 2016.06.28 XIU LIMING
  • US9379714B1 patent drawing
  • US9379714B1 patent drawing
  • US9379714B1 patent drawing

AI summary

Circuits for measuring TOF between two electrical signals comprises 1) a slow TAF-DPS clock signal generator for generating a slow clock signal, a fast TAF-DPS clock signal generator for generating a fast clock signal, said slow TAF-DPS clock signal generator comprises a gated ring oscillator and a TAF-DPS frequency synthesizer, said fast TAF-DPS clock signal generator comprises a gated ring oscillator and a TAF-DPS frequency synthesizer; 2) a phase detector for receiving said slow and fast clock signals and detecting point-of-coincidence between said slow and fast clock signals; 3) a first digital counter driven by said slow clock signal for storing the number of slow clock cycles and a second digital counter driven by said fast clock signal for storing the number of fast clock cycles; 4) a calibrator for calibrating said gate ring oscillators; 5) a calculation block for calculating TOF measurement result. Methods of using a slow TAF-DPS clock generator and a fast TAF-DPS clock generator for measuring TOF between two electrical signals are also disclosed.