Tag Processing Hardware for Memory Policy Violation Handling

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Solution Overview

Problem

Current computer security measures are inadequate in preventing malicious code execution, as vulnerabilities often arise from the intermingling of data and executable instructions in memory, allowing attackers to inject malicious code by disguising it as data, and existing solutions focus on monitoring patterns rather than preventing initial execution.

Innovation Solution

A computer-implemented method and system that utilize a host processor to execute violation processing code upon detecting a policy violation, involving the use of a tag processing hardware to enforce security policies by mapping application memory addresses to metadata memory addresses, ensuring instructions comply with security policies, and employing a policy processor to evaluate policies and determine the execution of instructions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If data and executable instructions are intermingled in memory, then memory usage is efficient and simple, but security is compromised as attackers can inject malicious code by disguising it as data

Engineering Contradiction:
Improvememory structure simplicityVSAvoidmalicious code injection
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

The patent divides memory into separate regions: a data memory region for storing application data and a code memory region for storing executable instructions. This segmentation prevents attackers from injecting malicious code by disguising it as data, as the code memory region is dedicated solely to executable instructions and is protected from unauthorized writes.

Inventive Principle:
Principle #1Segmentation

2Difficulty of detecting and measuring

If security monitoring patterns are implemented, then detection capability improves, but prevention of malicious code execution is not achieved as damage has already been done

Engineering Contradiction:
Improvesuspicious pattern detectionVSAvoidprevention of malicious code execution
Core Design Contradiction:
Difficulty of detecting and measuringVSReliability

Solution Approach 1:

The patent implements preliminary security measures by establishing separate code memory regions that are protected before any malicious code execution can occur. The system prevents unauthorized code execution at the memory level, ensuring that even if suspicious patterns are detected, the malicious code cannot be executed in the first place.

Inventive Principle:
Principle #10Preliminary action

3Duration of action of stationary object

If individual and organization fail to patch vulnerabilities in a timely manner, then operational continuity is maintained, but security becomes compromised as they become easy targets for attackers

Engineering Contradiction:
Improveoperational continuityVSAvoidsecurity against attacks
Core Design Contradiction:
Duration of action of stationary objectVSReliability

Solution Approach 1:

The patent implements prior cushioning by establishing memory protection mechanisms and separate code memory regions that prevent vulnerability exploitation before attackers can exploit them. The system provides inherent security against common vulnerabilities like buffer overflows and code injection, allowing organizations to maintain operational continuity without being easy targets for attacks.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS12124576B2Systems and methods for policy violation processing
Publication Date: 2024.10.22 DOVER MICROSYSTEMS INC
  • US12124576B2 patent drawing
  • US12124576B2 patent drawing
  • US12124576B2 patent drawing

AI summary

Systems and methods for violation processing. In some embodiments, in response to detecting a policy violation, tag processing hardware may enter a violation processing mode, and may cause a host processor to begin executing violation processing code. The tag processing hardware may continue checking one or more instructions in an instruction queue. In response to encountering, in the instruction queue, an instruction of the violation processing code, the tag processing hardware may exit the violation processing mode.