Tagged Memory Capacity Mapping for Dynamic Shared Allocation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing memory systems face inefficiencies in managing dynamic capacity allocation and sharing, leading to resource waste or the need for frequent reallocation due to fixed capacity units and lack of efficient duplicate management for shared data.

Innovation Solution

Implementing host-side aggregation and copy-on-write operations for tagged capacity in CXL memory devices, allowing incremental allocation and efficient duplicate management of shared data without modifying the original.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If fixed capacity units are used for memory allocation, then memory management is simplified, but resource waste increases and flexibility decreases

Engineering Contradiction:
Improvememory allocation flexibilityVSAvoidresource waste
Core Design Contradiction:
Adaptability or versatilityVSLoss of substance

Solution Approach 1:

The memory capacity is divided into tagged capacity units that can be independently allocated and managed. Each tag represents a distinct capacity unit that can be dynamically assigned to different hosts or processes, enabling fine-grained control over memory allocation and reducing waste from fixed-size allocations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system implements dynamic capacity allocation where tagged capacity units can be reallocated between hosts based on demand. The fabric manager dynamically manages tag-to-host mappings, allowing memory capacity to adapt to changing system requirements rather than being locked into fixed allocations.

Inventive Principle:
Principle #15Dynamics

2Quantity of substance

If data is shared between multiple processes without copy-on-write, then access speed is improved, but resource waste increases due to duplicate data

Engineering Contradiction:
Improvememory usage efficiencyVSAvoiddata access speed
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

The system implements copy-on-write semantics for shared tagged capacity. When a process needs to modify shared data, the system creates a private copy instead of allowing direct modification. This enables multiple processes to share the same physical memory pages read-only, saving memory resources, while still providing fast access to the shared data.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

Multiple processes can share the same tagged capacity unit and underlying physical memory pages. The system merges the view of multiple processes onto a single physical resource, reducing overall memory consumption while maintaining efficient access through shared memory mappings.

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If frequent reallocation is performed to manage dynamic capacity, then adaptability is improved, but system complexity increases

Engineering Contradiction:
Improvecapacity dynamic managementVSAvoidmemory management complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The fabric manager acts as an intermediary layer between hosts and physical memory resources. It manages the complexity of tag-to-host mappings and capacity allocation, shielding individual processes and hosts from the underlying complexity. The fabric manager handles reallocation operations centrally, reducing the burden on individual components.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system provides self-service mechanisms for capacity management through standardized tag-based interfaces. Hosts can request and receive capacity allocations without complex manual intervention, and the system automatically manages tag lifecycle, mapping, and reallocation based on system state.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS20250378018A1Host-side operations associated with tagged capacity of a memory device
Publication Date: 2025.12.11 MICRON TECHNOLOGY INC
  • US20250378018A1 patent drawing
  • US20250378018A1 patent drawing
  • US20250378018A1 patent drawing

AI summary

A host system can include a memory and a processing device, operatively coupled with the memory. The processing device is configured to perform operations including sending, to a memory device, data to be stored in the memory device, wherein the memory device comprises a plurality of dynamic capacity devices, wherein the plurality of dynamic capacity devices comprises a plurality of memory sections; receiving, from the memory device, a response including tag information, wherein the tag information comprises a set of tags in an order, wherein each tag of the set of tags is associated with a respective memory section of the plurality of memory sections, and wherein the respective memory section stores a respective portion of the data; mapping the tags to logical addresses of the data; and accessing the data by aggregating, in the order of the set of tags, a plurality of device physical address (DPA) ranges, wherein each DPA range of the plurality of DPA ranges is associated with a respective tag of the tags.