Tagged And Untagged Address Pointers for 32-Bit Memory Safety
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Solution Overview
Problem
32-bit processor cores face challenges in implementing memory safety due to limited address space and insufficient bits for tag metadata, restricting the use of tagged address pointers.
Innovation Solution
A data processing system employing both tagged and untagged address pointers, utilizing a type bit to differentiate between them, allowing selective memory tagging for safety, particularly in RAM, while using untagged pointers for other memory regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If tagged address pointers are used for all memory accesses in a 32-bit system, then memory safety is improved, but the available address space is reduced due to insufficient bits for tag metadata
Solution Approach 1:
The patent applies local quality by differentiating between tagged and untagged address pointers based on the memory region being accessed. Tagged pointers with metadata are used specifically for data regions requiring safety checks, while untagged pointers are used for code regions and other memory areas where tagging is unnecessary. This selective approach preserves address space while providing memory safety where needed.
Solution Approach 2:
The patent segments the memory space into distinct regions (data regions and code regions) that require different pointer types. By dividing the address space and assigning appropriate pointer types to each segment, the system achieves memory safety for critical regions without compromising the overall address space availability.
2Reliability
If tagged address pointers are used throughout the system, then detection of out-of-bound and use-after-free accesses is improved, but the complexity of the address pointer structure increases
Solution Approach 1:
The patent reduces complexity by applying tagging only where necessary for memory safety detection, rather than uniformly across all memory accesses. The type bit field enables the system to switch between tagged and untagged pointer modes, simplifying the pointer structure for code regions while maintaining enhanced safety for data regions.
3Adaptability or versatility
If a type bit field is added to differentiate tagged and untagged pointers, then the ability to selectively tag pointers is improved, but the size of the address pointer increases
Solution Approach 1:
The patent achieves universality by designing a unified address pointer structure that can function in multiple modes (tagged or untagged) based on the type bit field value. This single pointer type serves dual purposes: it provides memory safety tagging when needed and standard addressing when not needed, eliminating the need for separate pointer types and minimizing size overhead.
Data Source
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AI summary
A data processing system is provided that includes a processor and a memory. The processor is configured to execute instructions to access a location pointed to by an address pointer. The memory is coupled to the processor and configured to have a plurality of memory portions. A first address pointer for accessing a first portion of the memory includes a type bit field, a tag bit field, and a first address bit field. A second address pointer for accessing a second portion of the memory is configured to have only the type bit field and a second address bit field without the tag bit field. The type bit field is set to a first value for the tagged pointer and a second value for the untagged pointer. In another embodiment, a method is provided for accessing a location in the data processing system.