Tail-Biting Viterbi Decoding with Predictable Bit Rearrangement
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Solution Overview
Problem
Conventional Viterbi decoding methods using the tail-biting method result in increased processing delay and error rates due to repetitive processing and truncation errors at the ends of the decoded sequence, hindering low delay communication systems.
Innovation Solution
Rearranging control information sequences to limit the number of possible states in the encoder, allowing for low delay processing and reducing decoding errors by forming a coding target sequence with predictable bit sequences, similar to the termination method, while using the tail-biting convolutional coding scheme.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the tail-biting method is used for convolutional coding, then the initial state and end state of the encoder are the same (cyclic trellis), but the decoder cannot predict the initial state, resulting in increased processing delay and repetitive processing
Solution Approach 1:
The patent applies preliminary action by arranging predictable bit sequences (such as padding bits or known patterns) at specific positions in the coding block before encoding. This allows the decoder to predict the initial state of the encoder without requiring repetitive processing, thereby reducing processing delay while maintaining the tail-biting structure.
Solution Approach 2:
The patent changes the parameter arrangement within the coding block by positioning predictable bits at specific locations (e.g., at the beginning or at positions that correspond to state transitions). This reparameterization enables the decoder to infer the initial state from the received signal without exhaustive search, resolving the contradiction between state flexibility and processing delay.
2Device complexity
If the tail-biting method is used without predictable bits, then the coding structure is simple, but the decoder cannot predict the initial state, leading to increased error rates at the ends of the decoded sequence
Solution Approach 1:
The patent introduces predictable bit sequences at predetermined positions in the coding block before encoding. These predictable bits serve as reference points that enable the decoder to accurately determine the initial encoder state and reduce truncation errors at the sequence ends, thereby improving decoding accuracy without significantly increasing coding structure complexity.
Solution Approach 2:
The predictable bit sequences act as intermediaries between the encoder and decoder. They provide the decoder with additional information needed to infer the initial state, effectively mediating the decoding process and reducing errors without requiring complex encoding structures.
3Reliability
If repetitive processing is performed to decode tail-biting codes, then the decoding accuracy improves, but the processing delay increases
Solution Approach 1:
The patent applies preliminary action by pre-arranging predictable bit sequences in the coding block that enable the decoder to determine the initial state in a single processing pass. This eliminates the need for repetitive decoding operations while maintaining high decoding accuracy, thereby resolving the contradiction between accuracy and processing delay.
Solution Approach 2:
The patent enables the decoder to skip repetitive processing by using the predictable bit sequences to directly infer the initial state. This allows the decoding process to rush through in a single pass rather than requiring multiple iterative operations, reducing processing delay while maintaining accuracy.
Data Source
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AI summary
The coding apparatus, coding processing target sequence forming method and Viterbi decoding apparatus of the present invention can realize low delay processing with a minimum number of repetitive processing and suppress the degradation of the accuracy of decoding at the ends of a decoded sequence due to truncation error. In the coding apparatus mounted on the transmitting apparatus (100), a control information rearranging section (130) receives as input a control information sequence, in which a plurality of control information blocks are arranged in a predetermined order, and forms a coding processing target sequence by rearranging the order of the plurality of control information blocks to form an assembled sequence grouping control information blocks comprised of predictable bit sequences in the plurality of control information blocks, and to allocate the assembled sequence to a predetermined position in the control information sequence. Further , an encoding section (140) encodes the coding target sequence using the tail-biting convolutional coding scheme.