Embedded Tamper-Proof Conductive Ink Tracks in PCB Stack-Ups
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Solution Overview
Problem
Current tamper-proof layers in electronic packages are expensive, cumbersome to produce, and prone to false tamper calls due to material stress, moisture absorption, and handling issues, which can lead to the failure of highly resistive tracks and resistive networks.
Innovation Solution
A method for embedding conductive tracks and discrete components into printed circuit board stack-ups using standard manufacturing processes, involving the application of conductive ink, dielectric layers, and colloidal seeding copper plating, with a focus on symmetry to control mechanical behaviors and the use of thermosetting binder resins and fillers to create a robust and non-predictable tamper-proof matrix.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional tamper-proof layers with highly resistive conductive materials are used, then security detection capability is improved, but manufacturing complexity and cost increase
Solution Approach 1:
The patent replaces expensive, complex traditional tamper-proof layers with a simple conductive ink formulation that can be applied using standard PCB manufacturing processes. The conductive ink uses readily available materials (conductive particles in a binder) that are inexpensive and can be deposited through screen printing or similar low-cost methods, eliminating the need for specialized manufacturing equipment and processes.
Solution Approach 2:
The patent changes the electrical resistance parameter of the conductive tracks to be highly resistive (in the mega-ohm range) specifically for tamper detection purposes. This parameter change allows the use of simple resistance measurement circuits to detect tamper attempts, replacing complex monitoring systems while maintaining high security detection capability.
2Reliability
If highly resistive conductive materials are used in tamper-proof circuits, then security monitoring is improved, but current draw increases battery consumption
Solution Approach 1:
The patent optimizes the resistance parameter of the conductive ink tracks to achieve a balance between security monitoring capability and power consumption. By controlling the conductive particle concentration, particle size, and track geometry, the system achieves high resistance (for security) while maintaining low enough current draw to preserve battery life in portable devices.
Solution Approach 2:
The patent replaces active power-consuming monitoring systems with a passive resistance-based detection system. The highly resistive conductive ink tracks themselves serve as the sensing element, eliminating the need for separate active monitoring circuits that would consume additional battery power.
3Ease of manufacture
If standard manufacturing processes are used for conductive tracks, then ease of manufacture is improved, but tamper-proof reliability deteriorates
Solution Approach 1:
The patent uses a composite conductive ink material consisting of conductive particles (such as silver, copper, or carbon) suspended in a binder resin. This composite formulation can be applied using standard PCB manufacturing processes like screen printing, yet the resulting tracks provide the high resistance and reliability needed for tamper-proof applications. The composite nature allows optimization of both manufacturability and performance.
Solution Approach 2:
The patent applies conductive ink with specific local properties (high resistance, controlled conductivity) only where tamper detection is needed, while other PCB areas use standard conductive materials. This localized approach allows standard manufacturing processes to be used overall, while critical security areas have enhanced properties through the specialized conductive ink formulation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the security and reliability of tamper-proof layers by reducing production costs, improving mechanical stability, and preventing false tamper calls, while maintaining the integrity of resistive networks under thermal and environmental stresses.
Implementation Method 1
applying conductive ink as paste in the gap formed by said plating mask covering partially at least one face of said base substrate; liquefying said conductive ink to facilitate uniform distribution; gelling said conductive ink; and solidifying said conductive ink
Implementation Method 2
colloidal seeding copper plating
Data Source
AI summary
A method for embedding tamper proof layers and discrete components into a printed circuit board stack-up is disclosed. According to this method, a plating mask is applied on a base substrate to cover partially one of its faces. Conductive ink is then spread on this face so as to fill the gap formed by the plating mask. To obtain a uniform distribution of the conductive ink and then gel it, the conductive ink is preferably heated. A dielectric layer is applied on the conductive ink layer and the polymerization process is ended to obtain a strong adhesion between these two layers. In a preferred embodiment, conductive tracks are simultaneously designed on the other face of the base substrate to reduce thermo-mechanical strains and deformations.