Tamper Protection for Microprocessor Fuse Arrays

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Integrated circuits with programmable fuses face challenges in preventing unauthorized tampering and reconfiguration of features, as existing mechanisms allow unauthorized users to enable or disable security features using JTAG operations.

Innovation Solution

The implementation of a JTAG control chain, feature fuse, level sensor, and access controller within the integrated circuit, which monitors external voltage signals and determines if the feature fuse is blown, disabling extended JTAG operations if an illegal voltage level is detected, thereby preventing unauthorized access.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If extended JTAG operations are enabled for field programmability, then ease of operation is improved, but security against unauthorized tampering deteriorates

Engineering Contradiction:
Improvefield programmabilityVSAvoidsecurity against unauthorized tampering
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent applies preliminary action by implementing a level sensor that continuously monitors the FSOURCE voltage signal before extended JTAG operations can proceed. The sensor detects illegal voltage levels that would indicate tampering attempts, and the system preemptively prevents unauthorized fuse programming by detecting these conditions before they can compromise security. This proactive monitoring resolves the contradiction by maintaining ease of operation for authorized users while blocking unauthorized access.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If voltage monitoring is added to detect illegal levels, then security is improved, but device complexity increases

Engineering Contradiction:
Improvetamper detection capabilityVSAvoidcircuit components
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The level sensor in the patent is designed with multi-functionality, serving both as a voltage monitoring device for security detection and as part of the overall JTAG control infrastructure. By making the sensor integral to the existing JTAG operation framework rather than a completely separate security subsystem, the patent reduces the net increase in device complexity while maintaining improved tamper detection capabilities.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If extended JTAG operations are restricted to prevent tampering, then security is improved, but ease of operation deteriorates

Engineering Contradiction:
Improvefuse array securityVSAvoidfeature programmability
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The patent applies local quality by implementing selective monitoring and control differentiating between authorized and unauthorized operations. The level sensor monitors voltage levels locally at critical points in the JTAG interface, and the control logic applies different access rules based on the detected voltage conditions. This allows full programmability for authorized users with correct voltage levels while restricting access for unauthorized users, thus improving security without broadly reducing ease of operation.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS8341472B2Apparatus and method for tamper protection of a microprocessor fuse array
Publication Date: 2012.12.25 VIA TECH INC
  • US8341472B2 patent drawing
  • US8341472B2 patent drawing
  • US8341472B2 patent drawing

AI summary

An apparatus in an integrated circuit for precluding the use of extended JTAG operations. The apparatus has a JTAG control chain, a feature fuse, a level sensor, and an access controller. The JTAG control chain is configured to enable/disable the extended JTAG operations. The feature fuse is configured to indicate whether the extended JTAG features are to be disabled. The level sensor is configured to monitor an external voltage signal, and configured to indicate that the external voltage signal is at an illegal level. The access controller is coupled to the feature fuse, the level sensor, and the JTAG control chain, and is configured to determine if the feature fuse is blown, and is configured to direct the JTAG control chain to disable the extended JTAG operations if the external voltage signal is at an illegal level regardless of whether the feature fuse is blown.