Tamper-Resistant Non-Volatile Memory Device Using TRIZ Principles
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Solution Overview
Problem
Current non-volatile memory devices are vulnerable to side-channel attacks, such as Differential Power Analysis (DPA), which can compromise encryption keys stored in ICs, and existing Physically Unclonable Function (PUF) technologies face challenges in generating stable and secure digital ID data due to manufacturing variations and high error rates.
Innovation Solution
A non-volatile memory device with resistive memory cells that transition reversibly among resistance value ranges in response to electrical signals, using a control circuit to process control signals, a read circuit to obtain resistance value information, and an arithmetic circuit to calculate binary reference values for generating individual discrimination information, thereby creating secure and stable digital ID data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If encryption keys are stored in non-volatile memory, then key persistence is improved, but vulnerability to side-channel attacks increases
Solution Approach 1:
The patent introduces an intermediary layer between the non-volatile memory and the cryptographic processing circuit. This intermediary prevents direct observation of memory states through side-channel attacks while maintaining key persistence. The memory cells store encryption keys, but their states cannot be directly observed or manipulated by external probes, thus mediating between persistent storage and security requirements.
2Object-affected harmful factors
If latest fine process technology is used to prevent probe application, then physical probing security is improved, but manufacturing complexity increases
Solution Approach 1:
The patent replaces the mechanical approach of using finer process rules to prevent probe application with an electrical/memory-based solution. Instead of relying on physical dimensions smaller than probe tips, the invention uses non-volatile memory cells with states that cannot be directly observed or manipulated by probes, substituting mechanical miniaturization with a fundamentally different security mechanism.
3Adaptability or versatility
If PUF technology is used to generate digital ID data, then uniqueness is improved, but error rate increases
Solution Approach 1:
The patent implements a feedback mechanism where the system reads the resistance values of non-volatile memory cells, compares them against stored reference values, and uses this feedback to generate accurate digital ID data. This feedback loop corrects for manufacturing variations and ensures both uniqueness (through inherent cell variations) and reliability (through comparison with reference values).
Solution Approach 2:
The patent changes the parameter basis for generating digital ID data from inherently unstable physical variations to stable resistance value comparisons. By measuring resistance values of non-volatile memory cells and comparing them against reference values, the system transforms manufacturing variations into reliable, reproducible digital identifiers with low error rates.
4Object-affected harmful factors
If resistance values of memory cells are used for digital ID generation, then security against duplication is improved, but measurement precision requirements increase
Solution Approach 1:
The patent applies homogeneity by using multiple non-volatile memory cells with similar structures and materials to generate digital ID data. Instead of relying on a single measurement, the system uses resistance values from multiple homogeneous cells, comparing each against reference values. This homogeneous approach reduces the impact of measurement errors and increases both security against duplication and measurement robustness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances security by generating unique digital ID data that is difficult to duplicate, resistant to side-channel attacks, and reduces the overhead and error rate of digital ID data generation, improving the stability and efficiency of cryptographic operations.
Implementation Method 1
each of the memory cells having a resistance value and having a property that the resistance value reversibly transitions among resistance value ranges in a non-volatile manner in a variable state in accordance with application of different electrical signals
Data Source
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AI summary
A non-volatile memory device includes a memory cell array including memory cells, each having a resistance value reversibly transitioning among resistance value ranges in a variable state in accordance with application of different electrical signals, a control circuit that, in operation, receives a control signal, a read circuit that, in operation, obtains pieces of resistance value information each relating to the resistance value of one of the memory cells in accordance with the control signal, and an arithmetic circuit that, in operation, calculates a binary reference value based on at least a part of the pieces of resistance value information. In operation, the read circuit selectively assigns, based on the binary reference value, one of two values to each of the pieces of resistance value information.