Alternately Stacked Tantalum Oxide Capacitor Leak Current

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Solution Overview

Problem

Capacitors with amorphous tantalum oxide dielectric layers exhibit higher leak currents due to crystal grain boundaries and thin areas at these boundaries, which affect the performance of semiconductor memory devices.

Innovation Solution

A semiconductor device with a capacitor featuring alternately stacked polycrystalline tantalum oxide layers and separation layers, where one polycrystalline tantalum oxide layer is the lowermost layer, effectively suppressing leak current by preventing crystal grain boundaries from extending through the dielectric layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a single layer of polycrystalline tantalum oxide is used as the dielectric layer, then the dielectric constant is improved, but leak current increases due to crystal grain boundaries extending through the layer

Engineering Contradiction:
Improvedielectric constantVSAvoidleak current
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The single polycrystalline tantalum oxide layer is segmented into multiple thinner polycrystalline tantalum oxide layers separated by amorphous tantalum oxide layers. This segmentation prevents crystal grain boundaries from extending continuously through the dielectric layer, thereby reducing leak current while maintaining the high dielectric constant benefits of polycrystalline structure.

Inventive Principle:
Principle #1Segmentation

2Volume of moving object

If the dielectric layer is made thinner to reduce capacitor size, then device integration is improved, but leak current increases due to thin areas at crystal grain boundaries

Engineering Contradiction:
Improvecapacitor sizeVSAvoidleak current
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The dielectric layer is segmented into multiple thin polycrystalline tantalum oxide layers separated by amorphous tantalum oxide layers. This allows the overall dielectric layer to be thin for small capacitor size while the amorphous separation layers prevent leak current paths at crystal grain boundaries.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The dielectric layer uses a composite structure combining polycrystalline tantalum oxide (for high dielectric constant) and amorphous tantalum oxide (for low leak current). This composite structure achieves both small capacitor size and low leak current by leveraging the complementary properties of the two material phases.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution significantly reduces leak current in capacitors by ensuring that crystal grain boundaries are isolated, enhancing the reliability and performance of semiconductor memory devices.

Implementation Method 1

A capacitor having a dielectric layer made of tantalum oxide is disclosed

Methodology Applied
Scientific EffectDielectric: Dielectric

Implementation Method 2

The crystallized tantalum oxide single layer of about 10 nm has several crystal grain boundaries

Methodology Applied
Scientific EffectCrystallization: Crystallisation

Data Source

PatentUS7382014B2Semiconductor device with capacitor suppressing leak current
Publication Date: 2008.06.03 HEFEI RELIANCE MEMORY LTD
  • US7382014B2 patent drawing
  • US7382014B2 patent drawing
  • US7382014B2 patent drawing

AI summary

A semiconductor device with a capacitor includes a lower electrode, a dielectric and an upper electrode on the dielectric layer. The dielectric layer including more than one polycrystalline tantalum oxide layer and more than one separation layer, wherein the polycrystalline tantalum oxide layers and the separation layers are alternately stacked, while one of the polycrystalline tantalum oxide layers is a lowermost layer among the stacked layers.