TAP State Machine At-Speed Control via Command Circuit
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Solution Overview
Problem
The IEEE 1149.1 Test Access Port (TAP) struggles to effectively control embedded IC circuits that rely on at-speed Update & Capture and Shift & Capture operations, due to dead states in the TAP's state machine.
Innovation Solution
The introduction of additional circuitry, such as a Command (CMD) circuit and a Dual Port Router, allows for time division multiplexing of CMD signals onto the TMS input, detecting Exit1DR and PauseDR states to generate CMD signals, and using a Programmable Switch (PSW) or Dual Port Router to facilitate at-speed operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the TAP uses traditional state machine operations, then the TAP structure remains simple and well-established, but it cannot effectively control embedded IC circuits that require at-speed Update & Capture and Shift & Capture operations
Solution Approach 1:
The patent segments the TAP control functionality by introducing a separate Command circuit that operates independently from the traditional TAP state machine. The Command circuit receives multiplexed commands on the TMS line and generates control signals for at-speed operations, while the TAP state machine handles traditional operations. This segmentation allows the system to support both traditional and at-speed operations without requiring complete redesign of the TAP structure.
Solution Approach 2:
The patent implements multi-functionality by designing the TMS input line to serve dual purposes: traditional TAP state machine control and Command circuit control for at-speed operations. Through time-division multiplexing, the same physical line carries different types of commands at different times, enabling the TAP to handle both traditional boundary scan operations and at-speed Update & Capture/Shift & Capture operations without additional dedicated lines.
2Productivity
If the TAP includes additional circuitry for at-speed operations, then at-speed Update & Capture and Shift & Capture operations become possible, but the device complexity increases
Solution Approach 1:
The patent merges the Command circuit control paths with the existing TAP output infrastructure. The Command circuit generates control signals that are routed through the existing TAP output lines (TDO, TDI) and internal routing to reach the data registers and other embedded circuits. This merging approach allows at-speed operations to be implemented without creating entirely separate control paths, thereby reducing the increase in device complexity.
Solution Approach 2:
The patent introduces a Command circuit as an intermediary component that sits between the TMS input and the internal TAP state machine/data registers. This intermediary translates multiplexed commands into appropriate control signals for at-speed operations, bridging the gap between the simplified TMS interface and the complex internal circuitry required for at-speed Update & Capture and Shift & Capture operations.
3Reliability
If the TAP operates in traditional mode, then the state machine transitions are well-defined and reliable, but dead states prevent at-speed operations from occurring
Solution Approach 1:
The patent extracts the at-speed operation control functionality from the traditional TAP state machine by creating a separate Command circuit. This extraction removes the constraint of state machine dead states from at-speed operations, as the Command circuit operates independently and can generate control signals at any time without being constrained by state transitions. The traditional state machine continues to operate reliably for its defined purposes while the Command circuit enables at-speed operations without interference.
Solution Approach 2:
The patent uses periodic time-division multiplexing on the TMS line to alternately serve traditional TAP commands and at-speed operation commands. By dividing the TMS signal timeline into periodic slots for different command types, the system maintains reliable state machine operation during traditional command slots while enabling at-speed operations during dedicated command slots, preventing dead state issues from affecting at-speed performance.
Data Source
AI summary
In some examples, an integrated circuit comprises: a TDI input, a TDO output, a TCK input and a TMS input; a TAP state machine (TSM) having an input coupled to the TCK input, an input coupled to the TMS input, an instruction register control output, a TSM data register control (DRC) output, and a TSM state output; an instruction register having an input coupled to the TDI input, an output coupled to the TDO output, and a control input coupled to the instruction register control output of the TAP state machine; router circuitry including a TSM DRC input coupled to the TSM DRC output, a control DRC input coupled to the TSM state output, and a router DRC output; and a data register having an input coupled to the TDI input, an output coupled to the TDO output, and a data register DRC input coupled to the router DRC output.