TAP Controller Dynamic Register Access via Arbitration
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Solution Overview
Problem
Conventional systems using the JTAG standard for testing integrated circuits require all chip operations to stop when accessing internal registers, which is commercially undesirable as it disrupts normal chip operation, necessitating a method for dynamic access to chip internals without interruption.
Innovation Solution
A TAP controller system with an instruction register and data register, along with an arbitration module, allows for dynamic reading and writing to internal registers without interfering with normal chip operations by loading instructions and data, and gaining access through arbitration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of repair
If the JTAG standard is used to access internal registers for debugging, then debugging capability is improved, but normal chip operation is disrupted
Solution Approach 1:
The patent segments the access control mechanism by introducing an arbitration module that separates debugging access from normal operation access. The TAP controller is divided into distinct components (instruction register, data register, arbitration module) that work independently, allowing debugging operations to occur without halting the entire chip.
Solution Approach 2:
The arbitration module acts as an intermediary between the TAP controller and the internal register space. It mediates access requests from both the TAP controller (for debugging) and the normal operational circuits (for data processing), granting access to the appropriate party without completely blocking the other, thus enabling concurrent operations.
2Ease of operation
If all chip operations stop during TAP access, then access to internal registers is simplified, but system efficiency deteriorates
Solution Approach 1:
The patent implements dynamic access control where the arbitration module continuously evaluates access requests and dynamically grants or denies access based on current system state. This allows the system to adapt between debugging mode and normal operation mode without requiring complete operational halts, maintaining efficiency while enabling register access.
Solution Approach 2:
The arbitration module enables continuous useful action by allowing normal chip operations to proceed uninterrupted while still permitting debugging access when needed. The system maintains continuous productivity by overlapping debugging operations with normal operations rather than sequencing them sequentially, eliminating idle time.
Data Source
AI summary
A system and method for dynamically writing to and reading from an internal register space of a chip using a TAP controller without interfering with the normal operation of the chip is provided. Data that is to be written is loaded into a data register in the TAP controller before being written in the internal register space and the write instructions are loaded into an instruction register of the TAP controller. The address of the internal register space from where data is to be read is also loaded to the data register. Data is read and/or written from the internal register space after the TAP controller gets access to the internal register space via arbitration.