Tape Wiring Substrate Heat Dissipation via Central Pad Arrangement
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Solution Overview
Problem
Conventional tape packages for flat display devices experience inefficient heat radiation due to the dispersed arrangement of power and ground pads, leading to longer input wiring patterns and reduced heat dissipation capabilities, especially as frequency and voltage increase.
Innovation Solution
The semiconductor chip design includes power and ground pads centrally located along one edge, with input pads arranged along the same edge and output pads on the periphery, featuring reduced length and increased width of power and ground wiring patterns to enhance heat radiation, and a tape wiring substrate with parallel input and output wiring patterns connected via bumps for efficient heat transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If power pads and ground pads are dispersedly arranged on the semiconductor chip, then the chip can provide uniform power and ground distribution, but the input wiring patterns become longer and heat radiation capability is reduced
Solution Approach 1:
The patent applies local quality by concentrating power pads and ground pads in specific peripheral regions of the semiconductor chip rather than dispersing them uniformly. This localized arrangement optimizes heat radiation pathways while maintaining adequate power distribution to the active area, resolving the contradiction between uniform distribution and heat radiation efficiency
2Ease of manufacture
If input wiring patterns are arranged in peripheral areas of the semiconductor chip, then connection to power and ground pads is achieved, but the wiring pattern length increases and heat radiation capability is reduced
Solution Approach 1:
The patent employs asymmetric arrangement of input wiring patterns, positioning them strategically in peripheral areas with optimized pathways. This asymmetric design allows direct connection to centrally located power and ground pads while minimizing wiring length and maximizing heat radiation efficiency, rather than using symmetric peripheral arrangements
3Productivity
If frequency and voltage of the semiconductor chip are increased, then processing capability is improved, but heat generation increases and heat radiation becomes more difficult
Solution Approach 1:
The patent addresses heat management in high-frequency, high-voltage applications by utilizing the peripheral region of the chip as an additional dimension for heat dissipation. Input wiring patterns are routed to peripheral power and ground pads, creating extended heat radiation pathways along the chip edges, effectively managing heat generation from increased processing capability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces the length of input wiring patterns and increases the width of power and ground wiring patterns, improving heat radiation capabilities and maintaining efficient heat transfer from the semiconductor chip to external environments.
Implementation Method 1
The bumps 18 connect the semiconductor chip 10 to input and output wiring patterns 23 and 28 of the tape wiring substrate 20
Data Source
AI summary
A semiconductor chip, a tape package of the chip and a tape wiring substrate of the chip may be configured so as to effectively radiate heat generated from the chip externally through certain wiring patterns connected to certain pads. In an example, the chip may include a plurality of input pads along at least one edge of an active surface. The input pads may include power pads and ground pads. The chip may include a plurality of output pads along edges of the active surface, outside of the input pads. The power pads and the ground pads may be located at a central area of the at least one edge.