Semiconductor Package Geometry for Void-Free Underfill Filling

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Solution Overview

Problem

Conventional semiconductor packaging methods face challenges in achieving uniform underfill flow and preventing voids, which affect the mechanical stability of the package due to constant lateral dimensions in the space between semiconductor devices.

Innovation Solution

The semiconductor package design features a redistribution structure with semiconductor devices arranged such that the space between them has lateral dimensions decreasing continuously from the front to the back surfaces, facilitating improved underfill flow uniformity and eliminating voids.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional semiconductor packaging methods are used with constant lateral dimensions in the space between semiconductor devices, then the manufacturing process is simple, but the underfill flow is non-uniform and voids are formed

Engineering Contradiction:
Improveunderfill flow uniformityVSAvoidpackage structure
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies asymmetry by designing the space between semiconductor devices with non-constant lateral dimensions. Specifically, the space has a first lateral dimension at the front surface that is different from a second lateral dimension at the back surface, creating an asymmetric geometry that promotes uniform underfill flow from the front to the back surface, eliminating void formation while maintaining structural integrity

Inventive Principle:
Principle #4Asymmetry

2Reliability

If the space between semiconductor devices has constant lateral dimensions, then the manufacturing process is easier, but mechanical stability is reduced due to void formation

Engineering Contradiction:
Improvemechanical stabilityVSAvoidmanufacturing process
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The asymmetric space design with varying lateral dimensions improves mechanical stability by ensuring complete underfill penetration and eliminating voids. The gradient in lateral dimensions creates favorable flow characteristics that enhance the bonding between underfill and semiconductor devices, thereby improving overall package reliability without significantly complicating the manufacturing process

Inventive Principle:
Principle #4Asymmetry

3Manufacturing precision

If lateral dimensions of the space between semiconductor devices are constant, then device arrangement is simple, but underfill flow uniformity is poor

Engineering Contradiction:
Improveunderfill flow uniformityVSAvoidspace geometry
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The asymmetric geometry of the space between devices, with lateral dimensions that vary from front to back surface, creates optimal capillary flow characteristics. This asymmetric design ensures uniform underfill distribution by maintaining consistent flow velocity throughout the filling process, preventing both rapid front advancement and slow back penetration that occur with constant dimension designs

Inventive Principle:
Principle #4Asymmetry

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enhances the mechanical stability of the semiconductor package by ensuring uniform underfill flow and preventing voids, thereby improving the reliability of the package.

Implementation Method 1

the space between the first semiconductor device and the second semiconductor device has lateral dimensions that decrease continuously from the front surface to the back surface

Methodology Applied
Scientific EffectCapillary action: Capillary Action

Data Source

PatentUS20250132216A1Semiconductor package and method of forming the same
Publication Date: 2025.04.24 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250132216A1 patent drawing
  • US20250132216A1 patent drawing
  • US20250132216A1 patent drawing

AI summary

An semiconductor package includes a redistribution structure, a first semiconductor device, a second semiconductor device, an underfill layer and an encapsulant. The first semiconductor device is disposed on and electrically connected with the redistribution structure, wherein the first semiconductor device has a first bottom surface, a first top surface and a first side surface connecting with the first bottom surface and the first top surface, the first side surface comprises a first sub-surface and a second sub-surface connected with each other, the first sub-surface is connected with the first bottom surface, and a first obtuse angle is between the first sub-surface and the second sub-surface. The second semiconductor device is disposed on and electrically connected with the redistribution structure, wherein the second semiconductor device has a second bottom surface, a second top surface and a second side surface connecting with the second bottom surface and the second top surface, the second side surface faces toward to the first side surface, the second side surface comprises a third sub-surface and a fourth sub-surface connected with each other, the third sub-surface is connected with the second bottom surface, and a second obtuse angle is between the third sub-surface and the fourth sub-surface. The underfill layer is between the first semiconductor device and the second semiconductor device, between the first semiconductor device and the redistribution structure, and between the second semiconductor device and the redistribution structure. The encapsulant encapsulates the first semiconductor device, the second semiconductor device and the underfill layer.