Tapered Copper Post Structure for Heat-Dissipating Semiconductor Packages
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Solution Overview
Problem
The challenge in semiconductor packages is enhancing heat dissipation characteristics while maintaining a compact form factor, particularly in chip last structures, where increasing the copper post height is limited by current photosensitive film capabilities and leads to issues like undercut formation.
Innovation Solution
A semiconductor package design featuring a lower post connected to a first redistribution layer, an upper post with a gradually increasing width, and a mold layer covering the redistribution layer and semiconductor chip, with the upper post surface coplanar with the mold layer, enhancing heat dissipation and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If the height of copper post is increased to enhance heat dissipation characteristics, then heat dissipation performance is improved, but manufacturing difficulty increases due to limited photosensitive film height and undercut formation
Solution Approach 1:
The copper post is divided into two separate posts: a lower copper post extending from the first redistribution layer, and an upper copper post extending from the lower copper post. This segmentation allows each post to be formed independently using standard photosensitive film thicknesses, avoiding the need for a single excessively tall post that would be difficult to manufacture.
Solution Approach 2:
The lower copper post acts as an intermediary element connecting the first redistribution layer to the upper copper post. This intermediate structure enables thermal conduction from the chip through multiple stages, achieving enhanced heat dissipation while maintaining manufacturability of each individual component.
2Temperature
If the package thickness is increased to secure heat dissipation characteristics in chip last structure, then heat dissipation performance is improved, but device size increases
Solution Approach 1:
The upper copper post is formed with a width that gradually increases as it extends from the lower copper post toward the second redistribution layer, creating a tapered or conical shape. This dimensional variation allows the post to provide enhanced thermal conduction pathways while maintaining a compact overall package thickness, as the expanded upper portion distributes heat more effectively without requiring excessive height.
3Length of moving object
If two or more photosensitive films are used to secure desired copper post height, then post height is sufficient, but manufacturing defects occur such as undercut formation
Solution Approach 1:
Instead of using multiple photosensitive films stacked to achieve greater height, the invention segments the copper structure into separate lower and upper posts formed at different stages. Each post uses a single photosensitive film, eliminating the undercut issues that arise from multiple film layering while still achieving the desired total height through vertical stacking of separate copper structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design achieves improved heat dissipation and reliability by allowing for increased copper post height without the limitations of traditional photosensitive films, reducing undercut issues and ensuring efficient thermal management.
Implementation Method 1
a lower post directly connected to the first redistribution layer, an upper post connected to an upper surface of the lower post
Data Source
AI summary
A semiconductor package according to an example embodiment of the disclosure includes a first redistribution layer including a first via, a first redistribution pattern, and a first insulating layer, a first semiconductor chip connected to the first redistribution layer via a chip connection terminal, a lower post directly connected to the first redistribution layer, an upper post connected to an upper surface of the lower post, a first mold layer at least partially covering the first redistribution layer, the first semiconductor chip, the lower post, and the upper post, and a second redistribution layer on the upper post and the first mold layer. The upper post has a width that gradually increases as the upper post extends from the lower post toward the second redistribution layer. An upper surface of the upper post is coplanar with an upper surface of the first mold layer.