Tapered FinFET Structure for Multi-Vt Tuning

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Solution Overview

Problem

FinFET devices at 14 nm technology nodes face challenges in controlling short channel effects and achieving multi-threshold voltage (Vt) sensitivity due to narrow fin widths, which complicates the use of implant techniques and multi-work-function metal schemes.

Innovation Solution

A process is developed to form FinFET fins with a low-doped active top portion and a highly-doped active bottom portion, featuring vertical and tapered sidewalls, respectively, allowing for simpler and more controllable Vt tuning through selective doping and etching techniques.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If narrow fin width is used to control short channel effects, then transistor performance is enhanced, but channel volume becomes very small resulting in insufficient implant dose and low Vt sensitivity

Engineering Contradiction:

Improveshort channel effects controlVSAvoidchannel volume

Core Design Contradiction:

ReliabilityVSQuantity of substance

Solution Approach 1:

The fin structure is segmented into two distinct regions: a narrow top portion (5-10 nm width) for short channel control and a wider bottom portion (15-30 nm width) for sufficient implant dose. This segmentation allows each region to fulfill its specific function independently, resolving the contradiction between narrow width requirements and sufficient volume requirements.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different regions of the fin are given different geometrical properties - the top portion has narrow width for electrostatic control while the bottom portion has wider width for adequate implant dose. This local differentiation of geometric quality enables simultaneous optimization of both short channel effects control and implant effectiveness.

Inventive Principle:

Principle #3Local quality

2Ease of manufacture

If implant technique is used to tune Vt, then the process is simple and easy, but FinFET devices have low Vt sensitivity making it difficult to use effectively

Engineering Contradiction:

Improveimplant process simplicityVSAvoidVt sensitivity

Core Design Contradiction:

Ease of manufactureVSManufacturing precision

Solution Approach 1:

The fin geometry parameters are changed to create a tapered structure with wider bottom and narrower top. This geometric parameter change increases the implant dose by factor of 2-4x compared to conventional narrow fins, thereby increasing Vt sensitivity while maintaining the simplicity of the implant process.

Inventive Principle:

Principle #35Parameter changes

3Adaptability or versatility

If multi-work-function metal scheme is used to implement multi-Vt, then Vt tuning is achieved, but fabrication process becomes complicated with multiple patterning and metal fill steps

Engineering Contradiction:

Improvemulti-Vt capabilityVSAvoidfabrication process complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The fin structure is created with locally different geometries - wider bottom portion and narrower top portion - which enables different doping levels in different regions. This local geometric differentiation provides multi-Vt capability through a single unified fabrication process, avoiding the need for multiple work-function metals and complex patterning steps.

Inventive Principle:

Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach simplifies the fabrication of FinFETs by enabling effective Vt tuning and multi-Vt schemes, improving device performance and reducing the complexity of the fabrication process compared to conventional methods.

Implementation Method 1

implanting a dopant into the Si fin

Methodology Applied

Scientific EffectIon Implantation: Ion Implantation

Implementation Method 2

etching the active top portion of the Si fin to form vertical sidewalls

Methodology Applied

Scientific EffectPlasma Etching:

Implementation Method 3

tapering the active bottom portion of the Si fin

Methodology Applied

Scientific EffectWet Etching:

Data Source

PatentUS10347740B2Fin structures and multi-Vt scheme based on tapered fin and method to form

Publication Date: 2019.07.09 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A method of forming a FinFET fin with low-doped and a highly-doped active portions and/or a FinFET fin having tapered sidewalls for Vt tuning and multi-Vt schemes and the resulting device are provided. Embodiments include forming an Si fin, the Si fin having a top active portion and a bottom active portion; forming a hard mask on a top surface of the Si fin; forming an oxide layer on opposite sides of the Si fin; implanting a dopant into the Si fin; recessing the oxide layer to reveal the active top portion of the Si fin; etching the top active portion of the Si fin to form vertical sidewalls; forming a nitride spacer covering each vertical sidewall; recessing the recessed oxide layer to reveal the active bottom portion of the Si fin; and tapering the active bottom portion of the Si fin.