Tapered Gate Isolation for FinFET Residue Removal
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Solution Overview
Problem
As semiconductor devices continue to shrink in feature size, challenges arise in integrating more components into a given area, including issues with residue removal and filling efficiency during the formation of gate isolation regions in FinFET devices, which can lead to incomplete residue removal and reduced device performance.
Innovation Solution
The formation of gate isolation regions with a tapered profile, achieved by etching recesses between neighboring fins and depositing an isolation material with a sacrificial layer that has a smaller top width than bottom width, allowing for more complete residue removal and improved filling efficiency during subsequent process steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional gate isolation regions with uniform width are formed, then the manufacturing process is simple, but residue removal is incomplete and filling efficiency is reduced
Solution Approach 1:
The patent applies asymmetry by forming gate isolation regions with a tapered profile where the top width is less than the bottom width. This asymmetric geometry enables complete residue removal from the recesses while maintaining efficient metal filling, resolving the contradiction between manufacturing precision and device complexity.
Solution Approach 2:
The patent employs curved/tapered profiles instead of straight vertical walls by controlling the etching process to create recesses with specific curvature characteristics. This curvature enables better residue removal and metal fill efficiency compared to conventional uniform-width isolation regions.
2Productivity
If feature sizes are reduced to increase integration density, then more components can be integrated into a given area, but residue removal and filling efficiency deteriorate
Solution Approach 1:
The patent applies local quality by creating non-uniform width profiles in the gate isolation regions, where the width varies along the vertical dimension. This local variation in geometry enables effective residue removal and metal filling even as overall feature sizes are reduced to increase integration density.
3Ease of manufacture
If uniform width isolation regions are used, then the deposition process is straightforward, but metal fill efficiency is reduced
Solution Approach 1:
The asymmetric tapered profile of the gate isolation regions facilitates improved metal fill efficiency by providing adequate space for complete metal deposition while maintaining process feasibility. The varying width along the vertical dimension ensures efficient filling without requiring overly complex deposition procedures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability and performance of FinFET devices by ensuring complete residue removal and improved metal fill efficiency, reducing undesirable voltage threshold shifts and increasing device consistency.
Implementation Method 1
etching the dummy gate through the opening in the patterned mask to form a recess in the dummy gate, the etching including a plasma etching process
Implementation Method 2
the process gases react with the material of the dummy gate to form reaction products that deposit on sidewalls of the recess
Data Source
AI summary
A method includes forming a first fin and a second fin on a substrate; forming a dummy gate material over the first fin and the second fin; etching the dummy gate material using a first etching process to form a recess between the first fin and the second fin, wherein a sacrificial material is formed on sidewalls of the recess during the first etching process; filling the recess with an insulation material; removing the dummy gate material and the sacrificial material using a second etching process; and forming a first replacement gate over the first fin and a second replacement gate over the second fin, wherein the first replacement gate is separated from the second replacement gate by the insulation material.