Tapered Semiconductor Deposition Mask for High-Resolution OLED Patterning
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Solution Overview
Problem
Existing deposition methods, such as the use of fine metal masks, are inadequate for high-resolution patterning in display devices, particularly for organic light emitting displays, leading to inefficiencies and imperfect deposition areas.
Innovation Solution
A deposition mask comprising a semiconductor wafer with alternating silicon oxide and silicon nitride coating films, featuring specific geometric patterns and angles, and a mask opening, manufactured through a process involving etching and low-pressure chemical vapor deposition, enhances resolution and deposition efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a fine metal mask is used for depositing organic material in large-area displays, then the deposition process can be performed, but the resolution and patterning precision are insufficient for high-resolution displays
Solution Approach 1:
The patent changes the material parameter from metal to semiconductor (silicon wafer), and changes the geometric parameters by creating tapered hole patterns with controlled angles. This allows achieving high patterning precision suitable for high-resolution displays while maintaining manufacturability through established semiconductor fabrication processes
Solution Approach 2:
The mask is segmented into multiple functional layers including a semiconductor substrate, insulating films (silicon oxide, silicon nitride), and patterned hole structures. This segmentation allows each layer to be optimized independently for its specific function, achieving both high precision and ease of manufacture
2Productivity
If conventional deposition masks are used, then the deposition process can proceed, but imperfect deposition areas occur reducing overall efficiency
Solution Approach 1:
The patent employs asymmetric tapered hole patterns where the upper width differs from the lower width, with specific angle ranges (30-60 degrees for upper, 0-30 degrees for lower). This asymmetric geometry optimizes material flow and deposition uniformity, eliminating imperfect deposition areas while maintaining high productivity
3Manufacturing precision
If high-resolution patterning is achieved using semiconductor masks, then deposition precision improves, but the device complexity and manufacturing process complexity increase
Solution Approach 1:
The patent applies preliminary actions by pre-forming insulating films (silicon oxide and silicon nitride layers) on the semiconductor substrate before creating the hole patterns. This preliminary structuring simplifies subsequent processing steps and reduces overall device complexity while maintaining high pattern resolution
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The deposition mask enables the production of high-resolution display devices with reduced imperfect deposition areas, improving the overall manufacturing process efficiency.
Implementation Method 1
a first coating film on the mask substrate, and a second coating film on the first coating film
Data Source
AI summary
A deposition mask and a method for manufacturing the same are provided. A deposition mask includes: a mask substrate including a semiconductor wafer, a first coating film on the mask substrate, and a second coating film on the first coating film and including a hole pattern and a mask pattern that are alternately arranged, wherein an upper width of the hole pattern is less than a lower width thereof.