Tapered Cross-Section Nonvolatile Memory Layer
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
NAND nonvolatile memory devices face challenges due to 'short channel effects' from miniaturization, leading to variations in switching characteristics and electrical performance, as the cross-sectional dimensions of memory layers and rectifying elements are difficult to optimize simultaneously for low power and reduced load.
Innovation Solution
A nonvolatile memory device with a stacked body configuration where the cross-sectional dimension in the direction perpendicular to the stack direction gradually decreases from the rectifying element to the memory layer, allowing for a continuous change in dimensions to optimize electrical characteristics, achieved through controlled etching and masking techniques during manufacturing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the cross-sectional dimension of the memory layer is reduced to achieve low power consumption, then power consumption decreases, but the load on the rectifying element increases
Solution Approach 1:
The patent applies local quality by creating different cross-sectional dimensions at different locations within the stacked body. Specifically, the memory layer has a smaller cross-sectional dimension (optimized for low power) while the rectifying element has a larger cross-sectional dimension (optimized for reduced load). This is achieved by forming the stacked body with a tapered or trapezoidal cross-section that varies along the stacking direction, allowing each component to have locally optimized dimensions for its specific functional requirements
Solution Approach 2:
The patent resolves the contradiction by introducing dimensional variation along the stacking direction (third direction). Instead of using a uniform cross-section, the stacked body's cross-sectional dimension changes continuously or in steps along the stacking direction. This dimensional transition allows the memory layer and rectifying element to have different effective cross-sectional areas, thereby optimizing both power consumption and load characteristics simultaneously
2Reliability
If the cross-sectional dimension of the rectifying element is increased to reduce load, then load on rectifying element decreases, but power consumption increases
Solution Approach 1:
The patent applies local quality by creating different cross-sectional dimensions at different locations within the stacked body. Specifically, the memory layer has a smaller cross-sectional dimension (optimized for low power) while the rectifying element has a larger cross-sectional dimension (optimized for reduced load). This is achieved by forming the stacked body with a tapered or trapezoidal cross-section that varies along the stacking direction, allowing each component to have locally optimized dimensions for its specific functional requirements
Solution Approach 2:
The patent resolves the contradiction by introducing dimensional variation along the stacking direction (third direction). Instead of using a uniform cross-section, the stacked body's cross-sectional dimension changes continuously or in steps along the stacking direction. This dimensional transition allows the memory layer and rectifying element to have different effective cross-sectional areas, thereby optimizing both power consumption and load characteristics simultaneously
3Ease of manufacture
If a uniform cross-sectional dimension is used for the stacked body, then manufacturing is simplified, but future improvements in electrical characteristics are limited
Solution Approach 1:
The patent applies dynamics by transitioning from a static, uniform cross-sectional design to a dynamic design where the cross-sectional dimension varies along the stacking direction. This variable cross-section can be continuously tapered or changed in discrete steps, providing flexibility and adaptability for optimizing electrical characteristics while remaining manufacturable through controlled etching or deposition processes
Solution Approach 2:
The patent applies parameter changes by modifying the cross-sectional dimension parameter along the stacking direction. Instead of maintaining a constant cross-section, the design allows the cross-sectional area to change as a function of position, enabling optimization of electrical characteristics such as resistance, capacitance, and current distribution without fundamentally changing the manufacturing process complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables improved electrical characteristics by achieving low power consumption and reduced load on the rectifying element, while maintaining consistent cross-sectional dimensions for both components, thereby enhancing the performance of the nonvolatile memory device.
Implementation Method 1
forming an element isolation region by etching the stacked body via the etching mask
Data Source
AI summary
A nonvolatile memory device includes: a first interconnection extending in a first direction; a second interconnection extending in a second direction nonparallel to the first direction; and a memory layer placed between the first interconnection and the second interconnection and reversibly transitioning between a first state and a second state by a current supplied via the first interconnection and the second interconnection. A cross section parallel to the first and the second direction of the memory layer decreases toward the second interconnection.