Tapered Mesa Cap Layer for GaN HEMT Gate Insulation
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Solution Overview
Problem
The degradation of the gate insulating film in nitride semiconductor devices, particularly when the film thickness is smaller than the mesa portion, leads to property degradation and reduced breakdown voltage, necessitating an improvement in semiconductor device design to enhance reliability and reduce ON-resistance.
Innovation Solution
A semiconductor device configuration with a mesa-type cap layer and a tapered side surface, where the cap layer is processed using etching and heating treatments to reduce electric field concentration on the gate insulating film, and a gate electrode is formed via a gate insulating film that covers the cap layer, thereby improving the reliability of the gate insulating film and reducing ON-resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a mesa type cap layer is used to reduce ON-resistance, then device performance is improved, but electric field concentration occurs on the processed edge of the mesa portion causing gate insulating film degradation
Solution Approach 1:
The cap layer is designed with a curved upper surface instead of a flat surface, creating a rounded profile that distributes the electric field more uniformly across the gate insulating film. This curvature eliminates the sharp processed edges that cause electric field concentration, thereby preventing gate insulating film degradation while maintaining the mesa type structure for low ON-resistance.
Solution Approach 2:
The invention changes the geometric parameters of the cap layer by reducing its thickness at the processed edges and creating a tapered profile. This parameter modification redistributes the electric field intensity, preventing excessive concentration at specific points while maintaining overall device performance and low ON-resistance characteristics.
2Reliability
If the gate insulating film thickness is reduced to improve device performance, then ON-resistance is reduced, but breakdown voltage decreases and reliability deteriorates
Solution Approach 1:
The cap layer is designed with non-uniform thickness distribution, being thinner at the processed edges and thicker in the center region. This local quality variation allows the gate insulating film to have sufficient thickness in critical areas for high breakdown voltage while maintaining thinner regions where low ON-resistance is prioritized, thus resolving the contradiction between breakdown voltage and ON-resistance.
3Reliability
If a tapered side surface is formed on the cap layer to moderate electric field concentration, then TDDB life is enhanced, but manufacturing process complexity increases
Solution Approach 1:
The formation of the tapered side surface is integrated with the existing etching process for the mesa type cap layer. By combining the taper formation step with the standard fabrication sequence, the manufacturing process complexity is minimized while still achieving the electric field distribution improvement that enhances TDDB life.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The tapered side surface design effectively moderates electric field concentration, enhancing the time-dependent dielectric breakdown (TDDB) life and suppressing variation in ON-resistance, resulting in improved device performance and reliability.
Implementation Method 1
a step of performing a heating treatment on the nitride semiconductor layer. Thus, a side surface of the nitride semiconductor layer is tapered by the above-described heating treatment.
Data Source
AI summary
A property of a semiconductor device (high electron mobility transistor) is improved. A semiconductor device having a buffer layer, a channel layer, an electron supply layer, a mesa type cap layer, a source electrode, a drain electrode and a gate insulating film covering the cap layer, and a gate electrode formed on the gate insulating film, is configured as follows. The cap layer and the gate electrode are separated from each other by the gate insulating film, and side surfaces of the cap layer, the side surfaces being closer to the drain electrode and the source electrode, have tapered shapes. For example, a taper angle (θ1) of the side surface of the cap layer (mesa portion) is equal to or larger than 120 degrees. By this configuration, a TDDB life can be effectively improved, and variation in an ON-resistance can be effectively suppressed.