Tapered Pillar Structures for Memory Alignment and Contact Resistance

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Solution Overview

Problem

The challenge in semiconductor device fabrication is the increasing difficulty in aligning contacts between closely spaced conductive lines, leading to misalignment and elevated contact resistance, which decreases the drive current and performance of memory devices due to shrinking design rules and feature sizes.

Innovation Solution

The method involves forming pillar structures with upper portions wider than lower portions, allowing for increased alignment margin and reduced contact resistance by creating a larger cross-sectional area at the upper portions and a smaller critical dimension at the lower portions, facilitating enhanced isolation and improved contact formation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If design rules are reduced to increase integration density, then feature size and spacing are reduced, but alignment precision deteriorates leading to misalignment between contacts and conductive lines

Engineering Contradiction:
Improveintegration densityVSAvoidalignment precision
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The pillar structure implements local quality by having different cross-sectional dimensions at different heights. The upper portion has a larger cross-sectional area than the lower portion, creating a tapered geometry that provides a larger alignment margin at the contact region while maintaining small overall dimensions for high density integration.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The invention transitions from a two-dimensional planar contact structure to a three-dimensional tapered pillar structure. By utilizing the vertical dimension with different cross-sectional areas at different heights, the structure provides additional alignment tolerance without increasing the lateral footprint, thus maintaining high integration density.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If contact dimensions are reduced to increase integration, then contact area is reduced, but contact resistance increases dramatically

Engineering Contradiction:
Improveintegration densityVSAvoidcontact resistance
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The pillar structure provides local quality enhancement at the contact region by having a larger cross-sectional area at the upper portion where the contact is formed. This localized enlargement reduces contact resistance at the critical contact interface while keeping the lower portion dimensions small to maintain high integration density.

Inventive Principle:
Principle #3Local quality

3Quantity of substance

If separation distance between neighboring features is reduced to increase density, then alignment margin is reduced, but misalignment occurs leading to performance degradation

Engineering Contradiction:
Improvefeature densityVSAvoidalignment margin
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

By utilizing the vertical dimension with a tapered geometry, the invention provides additional alignment tolerance in the lateral direction. The larger upper cross-sectional area creates a bigger target for alignment, effectively increasing the alignment margin even when lateral spacing between features is reduced for high density integration.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS11925014B2Apparatuses including elongate pillars of access devices
Publication Date: 2024.03.05 MICRON TECHNOLOGY INC
  • US11925014B2 patent drawing
  • US11925014B2 patent drawing
  • US11925014B2 patent drawing

AI summary

A method of forming an apparatus comprises forming pillar structures extending from a base material. Upper portions of the pillar structures may exhibit a lateral width that is relatively greater than a lateral width of lower portions of the pillar structures. The method also comprises forming access lines laterally adjacent to the lower portions of the pillar structures and forming digit lines above upper surfaces of the pillar structures. Memory devices and electronic systems are also described.