Tapered Semiconductor Layer for DRAM Contact Resistance
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Solution Overview
Problem
In DRAM chip manufacturing, the high contact resistance between the contact and the semiconductor substrate results in low retention ability of memory cells due to a small contact area, which is exacerbated by the high height of the contact relative to the bit-line structure.
Innovation Solution
A semiconductor device is designed with a semiconductor layer that serves as a raising feature, reducing the contact height and increasing the contact area between the contact and the semiconductor layer, thereby lowering the contact resistance and enhancing the performance of DRAM memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If the contact height is increased relative to the bit-line structure, then the contact can reach higher levels in the device architecture, but the contact area between the contact and the semiconductor substrate decreases, resulting in higher contact resistance
Solution Approach 1:
The patent introduces a semiconductor layer that extends laterally between the contact and the bit-line structure, creating an additional dimensional pathway for electrical connection. This lateral extension increases the effective contact area without increasing the vertical height of the contact itself, thereby reducing contact resistance while maintaining the required vertical reach.
Solution Approach 2:
The semiconductor layer acts as an intermediary element between the contact and the bit-line structure. It provides an extended interface area that mediates the electrical connection, allowing current to flow through a larger area rather than through a small direct contact interface, thus reducing contact resistance.
2Reliability
If the contact area between the contact and the semiconductor substrate is increased, then the contact resistance decreases, but the height of the contact relative to the bit-line structure must be reduced
Solution Approach 1:
Instead of increasing contact area by enlarging the vertical footprint, the patent uses the semiconductor layer to extend the contact area laterally in a different dimension. This allows the contact to maintain its height relative to the bit-line structure while achieving a larger effective contact area through the lateral extension of the semiconductor layer between the contact and the bit-line.
3Reliability
If a semiconductor layer is added to increase contact area, then the contact resistance is reduced, but the device structure becomes more complex
Solution Approach 1:
The semiconductor layer serves multiple functions simultaneously: it increases the contact area to reduce contact resistance, provides lateral support between the contact and bit-line structure, and maintains the vertical architecture of the device. By making this single element multi-functional, the patent avoids adding multiple separate components that would increase complexity.
Data Source
AI summary
The present disclosure provides a semiconductor device. The semiconductor device includes a semiconductor substrate, a semiconductor layer, and a contact. The semiconductor layer is over the semiconductor substrate. The contact has an interface with the semiconductor layer. The contact is substantially tapered toward the semiconductor substrate to the interface.