Tapered Trench MOSFET Reducing Parasitic Capacitance
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Solution Overview
Problem
MOSFETs face trade-offs in optimizing device parameters such as on-resistance (RDSON) and breakdown voltage (BVDSS), where improvements in one parameter often degrade others, and existing structures and processes fail to simultaneously reduce parasitic capacitance and maintain high voltage support during the off-state.
Innovation Solution
The formation of a transistor structure with a tapered trench and a doped semiconductor region within a funnel-shaped trench, eliminating 90° corners and incorporating a conductive structure, which reduces the product of RDSON*Area and RDSON*QG, improving performance metrics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If conventional MOSFET structures with rectangular trenches are used, then manufacturing is simpler, but parasitic capacitance increases and breakdown voltage support deteriorates
Solution Approach 1:
The patent applies curvature by replacing the conventional rectangular trench with a tapered trench that has curved sidewalls instead of sharp 90-degree corners. The tapered shape with gradual transitions eliminates the abrupt geometric discontinuities that cause high electric field concentrations, thereby reducing parasitic capacitance while maintaining manufacturability through standard semiconductor fabrication processes.
Solution Approach 2:
The patent changes the geometric parameters of the trench structure by introducing a tapered profile with specific angle ranges (30-60 degrees from vertical). This parameter modification optimizes the balance between electric field distribution (reducing parasitic capacitance) and manufacturing feasibility, representing a controlled deviation from the conventional rectangular geometry.
2Object-affected harmful factors
If structures are optimized to reduce parasitic capacitance, then breakdown voltage support improves, but manufacturing complexity increases
Solution Approach 1:
The tapered trench design with curved sidewalls eliminates sharp corners that create electric field concentrations, thereby improving breakdown voltage support. The gradual tapering profile distributes electric fields more uniformly, enhancing voltage handling capability while remaining compatible with existing semiconductor manufacturing techniques.
Solution Approach 2:
By specifying the taper angle within the range of 30-60 degrees from vertical, the patent optimizes the geometric parameters to achieve improved breakdown voltage support. This parameter range represents a compromise that provides sufficient tapering for electric field management while maintaining compatibility with standard fabrication processes.
3Ease of manufacture
If conventional rectangular trench structures are used, then manufacturing is easier, but the product of RDSON*Area and RDSON*QG increases
Solution Approach 1:
The tapered trench structure with curved sidewalls reduces the product of RDSON*Area by eliminating the 90-degree corners that create unfavorable electric field distributions and increase parasitic effects. The smoother transitions in the tapered geometry reduce capacitive coupling and improve overall device performance metrics while remaining manufacturable.
Solution Approach 2:
The patent modifies the trench geometry parameters by introducing a taper angle of 30-60 degrees from vertical, which optimizes the balance between manufacturing ease and device performance. This parameter change reduces parasitic capacitance and improves the RDSON*Area and RDSON*QG products without requiring completely new fabrication methodologies.
Data Source
AI summary
An electronic device can include a semiconductor layer, and a trench extending into the semiconductor layer and having a tapered shape. In an embodiment, the trench includes a wider portion and a narrower portion. The electronic device can include a doped semiconductor region that extends to a narrower portion of the trench and has a dopant concentration greater than a dopant concentration of the semiconductor layer. In another embodiment, the electronic device can include a conductive structure within a relatively narrower portion of the trench, and a conductive electrode within a relatively wider portion of the trench. In another embodiment, a process of forming the electronic device can include forming a sacrificial plug and may allow insulating layers of different thicknesses to be formed within the trench.