Tapered TSV Conductive Layer Sidewall Coverage
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Solution Overview
Problem
Conventional through-substrate via (TSV) structures in semiconductor devices face challenges such as poor sidewall coverage, void formation, and high parasitic components that lead to RF signal losses, especially in high power RF applications, due to their high aspect ratio and inadequate structure design.
Innovation Solution
A TSV structure with a tapered conductive layer is introduced, where the TSV is filled with insulation material and the conductive layer is positioned between the insulation materials, electrically connected to the conductive member, and fabricated using a method involving substrate thinning, TSV opening formation, and deposition of a seed layer followed by a conductive layer, which reduces parasitic capacitance and mechanical stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional processes (sputtering or electroplating) are used to deposit conductive materials in TSVs, then the TSV structure can be formed, but poor sidewall coverage and void formation occur due to high aspect ratio
Solution Approach 1:
The patent applies curvature by transitioning from vertical sidewalls to tapered sidewalls in the TSV structure. The via holes are formed with tapered walls rather than perpendicular walls, which allows conformal deposition of conductive materials to achieve uniform sidewall coverage and eliminate void formation while accommodating the high aspect ratio constraint
Solution Approach 2:
The patent changes the geometric parameters of the TSV by implementing a tapered profile with specific angle ranges (30-60 degrees). This parameter modification transforms the deposition geometry, enabling conventional sputtering or electroplating processes to achieve proper sidewall coverage without voids while maintaining the required electrical connectivity
2Manufacturing precision
If the via depth is decreased to reduce aspect ratio, then filling becomes easier, but the substrate thickness constraint cannot be satisfied
Solution Approach 1:
The tapered sidewall geometry modifies the effective deposition path and surface area distribution, allowing complete via filling with conductive material even at high aspect ratios. The curvature of the tapered walls ensures uniform material distribution from top to bottom, achieving void-free filling without reducing via depth
3Manufacturing precision
If the via width is increased to reduce aspect ratio, then filling becomes easier, but available real estate on substrate is insufficient
Solution Approach 1:
The tapered sidewall geometry increases the effective surface area for conductive material deposition without increasing the via opening area. This allows adequate conductive material volume for low resistance connections while maintaining small via footprints that fit within the limited substrate real estate
4Ease of manufacture
If conventional TSV structure is used for high power RF applications, then manufacturing is simpler, but parasitic components attenuate and degrade RF signal considerably
Solution Approach 1:
The tapered sidewall geometry reduces parasitic inductance and capacitance by optimizing the current distribution and reducing discontinuities in the conductive path. This curvature-based design minimizes RF signal attenuation and degradation while maintaining compatibility with conventional manufacturing processes
Solution Approach 2:
The patent modifies the TSV geometric parameters by implementing specific taper angles (30-60 degrees) that optimize RF performance. These parameter changes reduce parasitic effects and improve signal integrity for high power RF applications while maintaining ease of manufacture with conventional processes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The tapered conductive layer structure improves the reliability and performance of TSVs by reducing signal losses and mechanical stress, enhancing manufacturability while maintaining low RF signal attenuation, especially at higher frequencies.
Implementation Method 1
A tapered opening is formed in the TSV and a conductive layer is deposited in the opening
Implementation Method 2
An insulation material is filled in the TSV opening to form a TSV
Data Source
AI summary
A semiconductor device is provided that includes a substrate, an integrated circuit with a conductive member and a through-substrate-via (TSV) structure. The substrate includes a front surface and a back surface that is opposite the front surface. The integrated circuit with the conductive member is formed over the front surface of the substrate. The TSV structure having vertical sidewalls is formed in the back surface of the substrate connecting with the conductive member. The TSV structure includes a tapered first insulation layer, a conformal conductive layer and a second insulation layer, with the conformal conductive layer positioned between the first and second insulation layers. The conformal conductive layer is electrically connected to the conductive member.