Tapered Via Hole Structure for Semiconductor Redistribution Layers

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Solution Overview

Problem

The miniaturization of integrated circuits (ICs) has led to challenges in forming effective redistribution layers (RDLs), particularly in creating via holes that accommodate the scaling down of ICs, where existing methods struggle to optimize via hole dimensions for efficient metal deposition and increased via density.

Innovation Solution

A method of forming a semiconductor structure involves creating a via hole with a bottom portion, a tapered portion, and a top portion, where the tapered and top portions are wider than the bottom portion, allowing for improved metal deposition space and increased via density, achieved by patterning a photoresist layer using a photomask with specific light transmission properties and etching techniques.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If via holes are scaled down to accommodate IC miniaturization, then IC size is reduced, but metal deposition becomes difficult and via density cannot be optimized

Engineering Contradiction:

ImproveIC sizeVSAvoidmetal deposition

Core Design Contradiction:

Volume of moving objectVSEase of manufacture

Solution Approach 1:

The patent changes the geometric parameters of the via hole by forming a tapered structure with varying width from bottom to top. This parameter change allows the via hole to maintain adequate metal deposition space while keeping the overall via size small for IC miniaturization, thereby resolving the contradiction between reduced IC size and ease of metal deposition.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent introduces a dimensional variation in the via hole structure by creating a tapered profile with different widths at different heights. This dimensional approach provides additional space for metal deposition in the upper portions while maintaining compact via footprints for high via density, thus resolving the contradiction between miniaturization and manufacturability.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If via hole width is increased to provide more metal deposition space, then metal filling is improved, but via density decreases

Engineering Contradiction:

Improvemetal deposition spaceVSAvoidvia density

Core Design Contradiction:

Area of stationary objectVSProductivity

Solution Approach 1:

The patent applies local quality by creating a via hole with non-uniform width distribution - narrower at the bottom and wider at the top. This local variation provides adequate metal deposition space in the upper portions where metal is deposited, while maintaining narrow dimensions at the bottom to achieve high via density, thus resolving the contradiction between metal deposition space and via density.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

Inventive Principle:

Principle #35Parameter changes

3Ease of manufacture

If conventional etching is used to form via holes, then fabrication is simple, but metal deposition overhang occurs

Engineering Contradiction:

Improvefabrication simplicityVSAvoidmetal deposition overhang

Core Design Contradiction:

Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by pre-forming the tapered shape of the via hole before metal deposition. This preliminary shaping of the via hole with wider top and narrower bottom prevents metal deposition overhang by providing adequate space for metal filling, thus resolving the contradiction between fabrication simplicity and manufacturing precision.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent applies preliminary anti-action by creating a via hole geometry that counteracts the tendency toward metal deposition overhang. The tapered structure with wider upper portions provides space that prevents overhang formation, thereby resolving the contradiction between simple fabrication and precise metal deposition.

Inventive Principle:

Principle #9Preliminary anti-action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach mitigates the adverse impacts of metal deposition overhang and enhances via density by providing a tapered via hole structure that accommodates wider top and tapered sections, facilitating better metal filling and reducing structural limitations.

Implementation Method 1

The photoresist layer is patterned by using a photomask having a light semi-transmissive portion between a light transmissive portion and a light shielding portion

Methodology Applied

Scientific EffectPhotomasking: Photography

Implementation Method 2

The dielectric layer is etched to form a via hole in the dielectric layer using the mask feature as an etch mask

Methodology Applied

Scientific EffectEtching:

Data Source

PatentUS11189523B2Semiconductor structure and fabrication method thereof

Publication Date: 2021.11.30 NAN YA TECH

AI summary

A method of forming a semiconductor structure includes the following steps. A dielectric layer is formed over a conductive line. A photoresist layer is formed over the dielectric layer. The photoresist layer is patterned to form a mask feature and an opening is defined by the mask feature. The opening has a bottom portion and a top portion communicated to the bottom portion, and the top portion is wider than the bottom portion. The dielectric layer is etched to form a via hole in the dielectric layer using the mask feature as an etch mask, such that the via hole has a bottom portion and a tapered portion over the bottom portion. The conductive material is filled in the via hole to form a conductive via.