Tapered Via Interconnection Structure with Anti-Adhesion Liner
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Solution Overview
Problem
The semiconductor industry faces challenges in forming efficient interconnection structures between conductive lines and dielectric materials in increasingly complex and smaller semiconductor integrated circuits, particularly in preventing byproduct adhesion during etching processes which can reduce the size of via openings and increase contact resistance.
Innovation Solution
The method involves forming a liner layer on a non-insulator structure, depositing a dielectric structure, and using an anti-adhesion layer to prevent byproduct adhesion during etching, followed by forming tapered via openings and conductive structures that expand towards the non-insulator structure to enhance contact area and reduce resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional etching processes are used to form via openings, then the etching can proceed through the dielectric material, but byproduct adhesion occurs on the sidewalls which reduces the effective via opening size and increases contact resistance
Solution Approach 1:
An anti-adhesion layer is introduced as an intermediary between the dielectric material and the etching byproducts. This layer prevents byproduct adhesion to the sidewalls during the etching process, maintaining the intended via opening dimensions and reducing contact resistance. The anti-adhesion layer serves as a mediator that eliminates the harmful interaction between etching byproducts and the via sidewalls.
Solution Approach 2:
The etching byproducts, which are normally harmful and cause sidewall adhesion problems, are converted into a beneficial situation by introducing the anti-adhesion layer. This layer allows the byproducts to deposit on its surface rather than on the critical via sidewalls, effectively converting the harmful adhesion effect into a harmless or even beneficial process where the byproduct deposition is redirected away from sensitive areas.
2Productivity
If the via opening size is reduced to increase device density, then more devices can be packed, but contact resistance increases due to smaller contact area with the non-insulator structure
Solution Approach 1:
The via opening is formed with a tapered profile rather than a straight cylindrical shape. This curvature in the via geometry creates a larger contact area at the bottom where the conductive structure meets the non-insulator structure, thereby reducing contact resistance while maintaining a small opening size at the top for high device density.
Solution Approach 2:
The via opening geometry is changed from a uniform cylindrical shape to a tapered shape with varying dimensions along its length. This parameter change allows the via to have a small top opening for high density while maintaining a larger bottom contact area for low contact resistance, effectively decoupling these two conflicting requirements.
3Reliability
If a tapered via opening is formed to increase contact area, then contact resistance is reduced, but the etching process becomes more complex requiring additional process steps
Solution Approach 1:
The anti-adhesion layer is deposited on the sidewalls before the etching process begins. This preliminary action prepares the sidewalls to resist byproduct adhesion during the subsequent etching step, enabling the formation of a clean tapered via profile without requiring complex in-situ etching control or multiple etching steps.
Solution Approach 2:
The anti-adhesion layer acts as an intermediary that simplifies the etching process for forming tapered vias. By preventing byproduct adhesion, it allows the etching to proceed cleanly with a single step, avoiding the need for complex multi-step etching processes or real-time byproduct removal mechanisms.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach prevents byproduct adhesion, maintains via opening size, and reduces contact resistance by increasing the contact area between conductive and non-insulator structures, thereby improving interconnection structure performance.
Implementation Method 1
an anti-adhesion layer is formed on inner surfaces of the recess
Implementation Method 2
conductive structures that expand towards the non-insulator structure to enhance contact area and reduce resistance
Data Source
AI summary
An interconnection structure includes a non-insulator structure, a liner layer, a dielectric structure and a conductive structure. The liner layer is present on the non-insulator structure and has an opening therein. The dielectric structure is present on the liner layer. The dielectric structure includes a via opening therein. The conductive structure is present in the via opening of the dielectric structure and electrically connected to the non-insulator structure through the opening of the liner layer. At least a portion of the conductive structure tapers along a direction from the non-insulator structure to the dielectric structure.