Tapless Standard Cell Body Biasing for SoC Speed Distribution

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Solution Overview

Problem

The challenge in semiconductor manufacturing is the widening operating speed distribution and increased power consumption of system-on-chips due to process variations, leading to higher defect rates and inefficiencies in existing circuit designs.

Innovation Solution

The method involves designing a system-on-chip using tapless standard cells with body biasing, where forward body biasing increases the slow corner operating speed and reverse body biasing decreases the fast corner operating speed, thereby adjusting timing parameters to optimize the operating speed distribution and reduce power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If conventional standard cells are used without body biasing, then the design process is simple, but the operating speed distribution widens and power consumption increases

Engineering Contradiction:
Improvedesign process complexityVSAvoidoperating speed
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The patent applies body biasing technology to dynamically adjust the threshold voltage of transistors by changing the body voltage parameter. This allows the operating speed of standard cells to be tuned without changing the physical structure, thereby improving operating speed while maintaining design simplicity. The body bias voltage can be adjusted to compensate for process variations and optimize performance.

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If conventional standard cells are used without body biasing, then the design process is simple, but power consumption increases

Engineering Contradiction:
Improvedesign process complexityVSAvoidpower consumption
Core Design Contradiction:
Device complexityVSUse of energy by stationary object

Solution Approach 1:

By adjusting the body bias voltage parameter, the patent optimizes the trade-off between power consumption and operating speed. Reverse body biasing increases threshold voltage to reduce leakage power, while forward body biasing decreases threshold voltage to improve switching speed. This dynamic parameter adjustment allows optimization of power consumption without complicating the overall design process.

Inventive Principle:
Principle #35Parameter changes

3Speed

If body biasing is applied to adjust operating speed, then operating speed improves, but device complexity increases

Engineering Contradiction:
Improveoperating speedVSAvoiddevice complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent uses tapless standard cells that can operate without dedicated tap connections, making the body biasing mechanism universal and applicable to standard cell libraries without requiring additional external control circuitry. This multi-functional approach allows the same standard cell structure to be used both with and without body biasing, reducing the increase in device complexity while maintaining the ability to adjust operating speed.

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Speed

If timing parameters are adjusted for body biasing, then operating speed distribution narrows, but design complexity increases

Engineering Contradiction:
Improveoperating speed distributionVSAvoiddesign complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent performs preliminary adjustment of timing parameters during the design phase to account for the effects of body biasing. By pre-calculating and incorporating the impact of forward and reverse body biasing on cell delays, the design process avoids complex real-time adjustments. This preliminary action narrows the operating speed distribution and reduces design complexity by resolving timing issues before implementation.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach improves the operating speed and reduces power consumption of system-on-chips while maintaining yield, by narrowing the design window and optimizing cell delays, resulting in a more efficient and smaller system-on-chip design.

Implementation Method 1

a slow corner changing step is performed such that a slow corner timing parameter is adjusted to increase a slow corner of an operating speed distribution for the system-on-chip by reflecting forward body biasing

Methodology Applied
Scientific EffectBody biasing:

Implementation Method 2

a fast corner changing step is performed such that a fast corner timing parameter is adjusted to decrease a fast corner of an operating speed distribution for the system-on-chip by reflecting reverse body biasing

Methodology Applied
Scientific EffectBody biasing:

Data Source

PatentUS8522188B2Method of designing a system-on-chip including a tapless standard cell, designing system and system-on-chip
Publication Date: 2013.08.27 SAMSUNG ELECTRONICS CO LTD
  • US8522188B2 patent drawing
  • US8522188B2 patent drawing
  • US8522188B2 patent drawing

AI summary

In a method of designing a system-on-chip including a tapless standard cell to which body biasing is applied, a slow corner timing parameter is adjusted to increase a slow corner of an operating speed distribution for the system-on-chip by reflecting forward body biasing, and a fast corner timing parameter is adjusted to decrease a fast corner of the operating speed distribution for the system-on-chip by reflecting reverse body biasing. The system-on-chip including the tapless standard cell is implemented based on the adjusted slow corner timing parameter corresponding to the increased slow corner and the adjusted fast corner timing parameter corresponding to the decreased fast corner. The slow corner timing parameter corresponds to a lowest value of an operating speed design window of the system-on-chip, and, the fast corner timing parameter corresponds to a highest value of the operating speed design window of the system-on-chip.