Tapped Transformer Antenna Tuner for Compact Wide-Range Matching
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Solution Overview
Problem
Existing antenna impedance tuners face challenges in achieving a compact, cost-effective, and uniformly behaving matching domain across varying frequencies, particularly in full-duplex systems where impedance variations significantly impact performance.
Innovation Solution
A fully integrated impedance transforming circuit utilizing a single tapped transformer with multiple taps and programmable capacitors, where switches connect to different taps on both windings to transform impedance, allowing for flexible and controlled impedance matching by resonating capacitors with the transformer's inductance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple separate inductors are used in the tuner, then the matching domain behavior becomes more complex and frequency-dependent, but the chip area increases
Solution Approach 1:
The patent combines multiple inductor functions into a single tapped transformer structure. Instead of using several separate inductors that would occupy large chip area, the invention uses one transformer with multiple taps that provides the same impedance transformation functionality, thereby reducing chip area while maintaining matching domain performance
Solution Approach 2:
The patent segments the transformer winding into multiple taps along the winding, allowing independent control of impedance transformation ratio. This segmentation enables flexible impedance matching across different frequencies without requiring multiple separate inductors, achieving both compact area and adaptable matching behavior
2Loss of energy
If off-chip inductors are used, then loss is minimized with very high quality factor, but the tuner cannot be fully integrated
Solution Approach 1:
The patent replaces mechanical/off-chip inductor components with an on-chip transformer implementation. By using planar spiral inductors and coupled structures that can be fabricated using standard CMOS processes, the invention achieves full integration while maintaining acceptable quality factor through optimized on-chip inductor design
3Area of stationary object
If a single transformer structure is used for full integration, then chip area is minimized, but achieving wide impedance matching range becomes more challenging
Solution Approach 1:
The patent makes the transformer adaptable by introducing multiple taps on both primary and secondary windings. These taps can be selectively connected through switches to dynamically change the effective turns ratio, enabling the single transformer to match a wide range of impedance values despite its compact size
Solution Approach 2:
The patent changes the electrical parameters of the transformer by tapping at different positions along the windings. This allows the transformation ratio to be adjusted in discrete steps, providing flexible impedance matching across a wide range while maintaining a compact single-transformer structure
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution reduces chip area, improves cost and size efficiency, and simplifies control algorithms by creating a well-ordered matching domain, enabling effective impedance transformation across a wide range while maintaining low losses and linearity.
Implementation Method 1
a tapped transformer comprising a first winding and a second winding
Implementation Method 2
allowing for flexible and controlled impedance matching by resonating capacitors with the transformer's inductance
Data Source
AI summary
A circuit (100) for impedance transforming comprises a first port (P1), a second port (P2) and a tapped transformer (110) comprising a first winding (111) and a second winding (112). Each winding comprises a first terminal, a second terminal and a number of taps connected at different positions between the first and second terminals. The circuit (100) further comprises a first programmable capacitor (C1) connected in shunt with the first winding (111) and a second programmable capacitor (C2) connected in shunt with the second winding (112), a first set of switches (S1) connected between the number of taps on the first winding (111) and a terminal of the first port (P1), and a second set of switches (S2) connected between the number of taps on the second winding (112) and a terminal of the second port (P2). The circuit (100) is configured to transform impedance between a first circuit (120) connected to the first port (P1) and a second circuit (130) connected to the second port (P2) by selectively connecting the first circuit (120) to one of the taps on the first winding (111) via the first set of switches (S1) and selectively connecting the second circuit (112) to one of the taps on the second windings (112) via the second set of switches (S2).