Target Adapter Write Command Processing for Storage Area Networks
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Solution Overview
Problem
Current methods for handling write commands in storage area networks are inefficient, as the target adapter needs to initiate a new write command and perform double DMA operations, consuming computing resources and increasing overhead.
Innovation Solution
A method and system where the target controller notifies the target adapter to process a write command with a virtual LUN indicator, allowing the target adapter to send a response to the initiator, receive data, and transfer it directly to the storage device, eliminating unnecessary DMA operations and interrupts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the target adapter initiates a new write command and performs double DMA operations, then data can be written to the storage device, but processing overhead increases and efficiency decreases
Solution Approach 1:
The target adapter pre-issues the write command to the storage device before receiving the actual data from the initiator. This preliminary action eliminates the need to initiate a new command after data receipt, reducing processing overhead and improving write operation efficiency.
Solution Approach 2:
The patent extracts and eliminates the redundant second DMA operation from the traditional write process. By having the target adapter directly forward data to the storage device without requiring a second DMA transfer through the host system, the unnecessary processing step is removed, reducing overhead while maintaining data integrity.
2Loss of time
If the target adapter sends response and issues write command simultaneously, then processing time is reduced, but coordination complexity increases
Solution Approach 1:
The patent merges the response sending operation and the write command issuance into a single simultaneous action by the target adapter. This combination eliminates sequential delays between acknowledging the initiator and initiating the data transfer, reducing processing time while the underlying hardware architecture handles the coordination automatically.
Solution Approach 2:
The target adapter autonomously manages the coordination of simultaneous response sending and write command issuance without requiring additional host system intervention. This self-service capability reduces processing time by eliminating external coordination overhead, as the adapter independently handles both operations in parallel.
Data Source
AI summary
Machine implemented methods and systems for writing data at a storage device are provided. A write command from an initiator adapter is received at a target adapter interfacing with a target controller for writing data to the storage device; where the write command includes information regarding a virtual logical unit number (LUN) for writing data in response to the write command. The target controller uses an indicator to notify the target adapter to process the write command and provides information regarding a designated LUN for the storage device where data is to be written at the storage device in response to the write command. Thereafter, the target adapter sends a response to the initiator adapter that it is ready to receive data and issues a write command for the storage device at the same time.