Target Calculation in Rewritable Memory Storage for Reduced Data Transfer

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Solution Overview

Problem

The frequent necessity for data transmission between AI models and rewritable non-volatile memory modules during computational processes adversely impacts the practical computational performance, leading to unfavorable user experiences.

Innovation Solution

A memory operation method and device that performs target calculations on data stored in rewritable non-volatile memory modules, reducing the amount of data transmission by migrating calculations to the memory storage device, thereby enhancing computational performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If data transmission is performed frequently between AI models and memory storage device, then data access is enabled, but computational performance deteriorates

Engineering Contradiction:
Improvedata accessVSAvoidcomputational performance
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The memory storage device performs calculations autonomously using stored data without requiring frequent host system intervention. The calculation model is loaded into the memory storage device, enabling it to self-process data and reduce dependency on continuous data transmission from the host system, thereby improving computational performance while maintaining data access capability.

Inventive Principle:
Principle #25Self-service

2Productivity

If calculations are performed in host system, then computational performance is high, but data transmission frequency increases

Engineering Contradiction:
Improvecomputational performanceVSAvoiddata transmission time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The calculation model is pre-loaded into the memory storage device before data processing begins. This preliminary action enables the memory storage device to perform calculations locally on incoming data without waiting for host system processing, reducing data transmission time and improving overall computational efficiency.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The memory storage device acts as an intermediary between data storage and calculation processing. By loading the calculation model into the memory storage device, it becomes a mediator that can process data locally without requiring constant communication with the host system, thereby reducing data transmission frequency and time.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Loss of time

If calculation model is stored in memory storage device, then data transmission is reduced, but device complexity increases

Engineering Contradiction:
Improvedata transmission timeVSAvoidmemory storage device complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The memory storage device is designed to perform multiple functions: data storage, calculation model execution, and local data processing. By making the memory storage device multi-functional, the system reduces the need for separate dedicated calculation devices, thereby reducing overall system complexity while achieving reduced data transmission time through local processing capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12353768B2Memory operation method including performing target calculation in memory storage device, memory storage device and memory control circuit unit
Publication Date: 2025.07.08 PHISON ELECTRONICS
  • US12353768B2 patent drawing
  • US12353768B2 patent drawing
  • US12353768B2 patent drawing

AI summary

A memory operation method, a memory storage device, and a memory control circuit unit are disclosed. The memory operation includes following steps. First data is received from a host system. The first data is stored into a first physical unit which is mapped to a first logical unit. In a first operation mode, a target calculation is performed based on the first data and second data stored in a second physical unit to obtain third data, and the third data is different from the first data. The third data is stored into a third physical unit which is also mapped to the first logical unit. The third data is transmitted to the host system.