Target Network Interface Address Translation for Lower Latency

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Solution Overview

Problem

Scale-out block storage services in distributed systems incur significantly higher latency compared to industry-standard NVMe-oF block protocols, limiting the choice between low latency with limited services or additional services with higher latency.

Innovation Solution

Implement a target network interface device that converts logical block addresses (LBAs) to physical addresses using a conversion table or mapping, potentially reducing end-to-end latency by directly accessing NVMe-oF storage devices and minimizing intermediate protocol translations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If scale-out block storage services are deployed with additional services, then storage capacity and functionality are improved, but access latency increases significantly

Engineering Contradiction:
Improvestorage servicesVSAvoidaccess latency
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent introduces a target network interface device as an intermediary component between the client and the distributed storage system. This device performs LBA-to-physical address translation and protocol conversion, acting as a mediator that enables direct NVMe-oF access to storage devices while maintaining compatibility with existing client applications. The intermediary handles the complexity of address translation and protocol conversion, allowing clients to access storage services without experiencing the full latency overhead of traditional scale-out storage paths.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent extracts the address translation and protocol conversion functions from the client-side software stack and relocates them to the target network interface device. By taking out these translation operations from the client path, the system eliminates the need for clients to perform complex LBA-to-physical address mappings, thereby reducing client processing overhead and enabling direct, low-latency access to storage devices through the network interface device.

Inventive Principle:
Principle #2Taking out (Extraction)

2Loss of time

If direct NVMe-oF access is implemented, then access latency is reduced, but client applications require modification to work with physical addresses

Engineering Contradiction:
Improveaccess latencyVSAvoidclient application
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The target network interface device serves as an intermediary that transparently handles address translation between logical block addresses (used by clients) and physical addresses (used by storage devices). This mediator performs protocol conversion and address mapping automatically, allowing clients to continue using standard NVMe-oF protocols with logical addresses while the network interface device translates these to physical addresses for direct storage access, thus reducing latency without requiring client modifications.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system enables self-service address translation where the target network interface device autonomously performs LBA-to-physical address conversion without requiring client applications to be aware of or modify their address handling. The network interface device maintains its own translation tables and protocols, serving itself in the address translation process while presenting a simplified interface to clients.

Inventive Principle:
Principle #25Self-service

3Adaptability or versatility

If protocol translation is performed through SDS software stack, then storage services are accessible, but processing time increases

Engineering Contradiction:
Improvestorage accessVSAvoidprocessing time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent extracts the protocol translation and address conversion functions from the SDS software stack and relocates them to the target network interface device. By removing these translation operations from the software stack path, the system eliminates the processing time overhead associated with SDS protocol translation while maintaining the ability to access distributed storage services. The network interface device performs translation directly at the hardware level, significantly reducing processing time.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the software-based SDS stack protocol translation with a hardware-accelerated approach at the target network interface device. Instead of relying on software processing for address translation and protocol conversion, the system uses hardware-level translation tables and direct NVMe-oF support, substituting the mechanical software processing with faster hardware operations that achieve the same functionality with minimal processing time.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS12461862B2Address translation at a target network interface device
Publication Date: 2025.11.04 INTEL CORP
  • US12461862B2 patent drawing
  • US12461862B2 patent drawing
  • US12461862B2 patent drawing

AI summary

Examples described herein relate to a network interface device comprising circuitry to receive an access request with a target logical block address (LBA) and based on a target media of the access request storing at least one object, translate the target LBA to an address and access content in the target media based on the address. In some examples, translate the target LBA to an address includes access a translation entry that maps the LBA to one or more of: a physical address or a virtual address. In some examples, translate the target LBA to an address comprises: request a software defined storage (SDS) stack to provide a translation of the LBA to one or more of: a physical address or a virtual address and store the translation into a mapping table for access by the circuitry. In some examples, at least one entry that maps the LBA to one or more of: a physical address or a virtual address is received before receipt of an access request.