Targeted Trace Recording via Partial Snapshots
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Solution Overview
Problem
Conventional diagnostic tools face significant overheads and challenges in recording and replaying multi-threaded applications, leading to performance penalties and difficulties in reproducing undesired software behaviors due to the need for emulation and potential interference from other threads.
Innovation Solution
The approach involves targeted partial recording of executable entities by identifying inputs to specific code portions, recording snapshots of these inputs, and replaying the execution without emulation, while using techniques like forking and processor state recording to ensure accuracy and reliability, reducing overheads and performance impact.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If bit-accurate trace recording is performed by emulating thread execution to record processor state and memory reads, then measurement precision of historic debugging is improved, but productivity of the application execution is significantly reduced
Solution Approach 1:
The patent segments the trace recording process by dividing threads into target threads (whose execution is to be recorded) and non-target threads (whose execution is skipped). This selective recording approach allows bit-accurate traces to be captured for specific threads without requiring emulation of all threads, thereby maintaining measurement precision while improving productivity by avoiding unnecessary emulation overhead.
Solution Approach 2:
The patent applies partial action by recording only the necessary portions of thread execution states (processor state and memory reads) for target threads, rather than performing complete emulation of all threads. This partial recording strategy achieves sufficient trace accuracy for debugging purposes while significantly reducing the performance penalty associated with full emulation of multi-threaded applications.
2Reliability
If multi-threaded applications are recorded by emulating each thread one-by-one in linear manner, then reliability of trace recording is improved by eliminating thread interference, but productivity is significantly penalized due to sequential execution
Solution Approach 1:
The patent extracts the recording function from the execution flow by capturing processor state and memory read information directly during native execution of target threads, without requiring sequential emulation of all threads. This extraction approach maintains trace reliability by capturing accurate execution states while improving productivity by allowing concurrent execution of multiple threads without forced serialization.
Solution Approach 2:
The patent creates copies of essential execution information (processor state snapshots and memory read values) for target threads without requiring full thread emulation. These copied data representations enable reliable replay of target thread execution while avoiding the productivity penalty of sequential emulation, as the original threads can continue executing natively in parallel.
3Measurement precision
If complete thread execution is emulated to capture all inputs and outputs, then measurement precision of trace data is improved, but device complexity of the recording system increases
Solution Approach 1:
The patent applies local quality by implementing targeted recording for specific target threads rather than uniform recording of all threads. The recording mechanism focuses computational resources on capturing processor state and memory reads only for threads marked as targets, using thread identifiers to distinguish target from non-target threads. This localized approach maintains high measurement precision for recorded threads while reducing overall system complexity by avoiding unnecessary processing of non-target threads.
Data Source
AI summary
During an execution of a first executable entity, a computer system determines that a target chunk of executable instructions is to be recorded during the execution. Prior to executing the target chunk of executable instructions, the computer system identifies one or more input(s) of the target chunk of executable instructions, and adjusts a page table entry to cause a page fault based on an access by a second executable entity to a first memory page that corresponds to an identified input, and/or an access by the first executable entity to a second memory page that does not correspond to any identified input. Based on detecting an occurrence of a page fault during an execution of the target chunk of executable instructions, the computer system detects that there an interference with an identified input by the second executable entity and/or an incompleteness of the identified inputs.