Multi-Core Processor Task Grouping for Interference Bounding

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Solution Overview

Problem

In safety-critical real-time systems, multi-core processors face challenges in measuring and bounding cross-core interference due to shared resources, which hinders the full performance benefits of multi-core processors.

Innovation Solution

A processing cluster is configured to execute software as multiple instruction entities in execution groups, with schedule-before relationships and scheduling restrictions enforced to manage interference and ensure correct execution, using a scheduler to assign instruction entities to processing units while constraining execution overhead and interference within groups.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multi-core processors are used to execute multiple tasks simultaneously, then processing throughput is improved, but cross-core interference due to shared resources increases

Engineering Contradiction:
Improveprocessing throughputVSAvoidcross-core interference
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent segments the multi-core processor system into isolated execution contexts or partitions, where each core or group of cores operates within defined boundaries. This segmentation limits the propagation of interference between cores by creating separate execution environments that share resources in a controlled manner, thus maintaining high throughput while reducing harmful cross-core interference.

Inventive Principle:
Principle #1Segmentation

2Reliability

If worst case processing time is bounded for safety-critical systems, then system reliability is improved, but measurement and bounding of cross-core interference becomes more difficult

Engineering Contradiction:
Improvesystem reliabilityVSAvoiddifficulty of measuring cross-core interference
Core Design Contradiction:
ReliabilityVSDifficulty of detecting and measuring

Solution Approach 1:

The patent introduces intermediary mechanisms such as resource arbitration layers, isolation barriers, or monitoring agents that mediate between executing tasks and shared resources. These intermediaries provide controlled access to shared resources and enable the measurement and bounding of interference effects without requiring direct observation of complex cross-core interactions, thus facilitating reliability verification while managing measurement difficulty.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If scheduling requirements are enforced to ensure proper task execution, then task correctness is improved, but execution overhead increases

Engineering Contradiction:
Improvetask correctnessVSAvoidexecution overhead
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-configuring scheduling policies, resource allocation rules, and execution constraints before task execution begins. Scheduling decisions and resource reservations are made in advance, allowing tasks to execute with minimal runtime intervention. This approach ensures task correctness through pre-established scheduling requirements while reducing execution overhead by minimizing runtime scheduling operations.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9207977B2Systems and methods for task grouping on multi-processors
Publication Date: 2015.12.08 HONEYWELL INTERNATIONAL INC
  • US9207977B2 patent drawing
  • US9207977B2 patent drawing
  • US9207977B2 patent drawing

AI summary

Embodiments of the present invention provide improved systems and methods for grouping instruction entities. In one embodiment, a system comprises a processing cluster to execute software, the processing cluster comprising a plurality of processing units, wherein the processing cluster is configured to execute the software as a plurality of instruction entities. The processing cluster is further configured to execute the plurality of instruction entities in a plurality of execution groups, each execution group comprising one or more instruction entities, wherein the processing cluster executes a group of instruction entities in the one or more instruction entities in an execution group concurrently. Further, the execution groups are configured so that a plurality of schedule-before relationships are established, each schedule-before relationship being established among a respective set of instruction entities by executing the plurality of instruction entities in the plurality of execution groups.