Task Matching Circuit for Selective Processor Synchronization

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Solution Overview

Problem

Existing cryptographic processing systems face challenges in maintaining synchronization between redundant microprocessors due to factors like power conservation, asynchronous interrupts, and out-of-order execution, which can lead to unsuitable lock-step operation and resource wastage in harmonization of software tasks.

Innovation Solution

A task matching circuit is introduced to synchronize software on multiple processors by comparing software routine identifiers and delaying one processor until both match, ensuring that high-assurance tasks are executed in alignment, while allowing for flexibility in task management and resource allocation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If lock-step operation is used to synchronize processors, then synchronization reliability is improved, but device complexity and resource wastage increase

Engineering Contradiction:
Improvesynchronization reliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments software tasks into high-assurance tasks requiring synchronization and low-assurance tasks that do not. The task matching circuit only synchronizes high-assurance tasks, while low-assurance tasks execute independently on each processor. This segmentation resolves the contradiction by maintaining synchronization reliability for critical tasks without imposing lock-step complexity on all operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different synchronization qualities to different task types. High-assurance tasks receive full synchronization treatment through the task matching circuit, while low-assurance tasks execute with relaxed synchronization requirements. This local differentiation resolves the contradiction by providing appropriate synchronization only where needed, reducing overall device complexity.

Inventive Principle:
Principle #3Local quality

2Reliability

If lock-step operation is used to synchronize processors, then synchronization reliability is improved, but productivity decreases

Engineering Contradiction:
Improvesynchronization reliabilityVSAvoidproductivity
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

By segmenting tasks into synchronized and non-synchronized categories, the patent allows low-assurance tasks to execute independently without waiting for processor alignment. This eliminates the productivity penalty of lock-step operation for non-critical tasks while maintaining synchronization reliability for high-assurance tasks through the task matching circuit.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies synchronization only partially - specifically to high-assurance tasks that require it - rather than applying lock-step operation to all tasks. This partial action resolves the contradiction by providing sufficient synchronization reliability where needed while avoiding the productivity loss that would result from synchronizing all tasks.

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If full software synchronization is enforced on all tasks, then synchronization reliability is improved, but loss of energy increases

Engineering Contradiction:
Improvesynchronization reliabilityVSAvoiduse of energy
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent segments the software task set into high-assurance and low-assurance categories, applying energy-intensive synchronization only to high-assurance tasks through the task matching circuit. Low-assurance tasks execute without synchronization overhead, significantly reducing total energy consumption while maintaining reliability for critical operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the synchronization parameter from a binary lock-step mode to a selective mode based on task classification. The task matching circuit dynamically determines which tasks require synchronization, adjusting the synchronization parameter accordingly. This resolves the contradiction by optimizing energy usage while preserving reliability where necessary.

Inventive Principle:
Principle #35Parameter changes

4Productivity

If task matching and synchronization is implemented, then productivity is improved through resource efficiency, but device complexity increases

Engineering Contradiction:
ImproveproductivityVSAvoiddevice complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces a task matching circuit as an intermediary component that compares task identifiers and controls synchronization timing. This intermediary resolves the contradiction by providing automated task matching and synchronization control, improving productivity through efficient resource utilization while containing complexity within a dedicated circuit rather than distributing it throughout the entire system.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS8527741B2System for selectively synchronizing high-assurance software tasks on multiple processors at a software routine level
Publication Date: 2013.09.03 VIASAT INC
  • US8527741B2 patent drawing
  • US8527741B2 patent drawing
  • US8527741B2 patent drawing

AI summary

A task matching circuit for synchronizing software on a plurality of processors is disclosed. The task matching circuit includes first and second inputs, an analysis sub-circuit, and an output. The first input is from a first processor configured to receive a first software routine identifier. The second input is from a second processor configured to receive a second software routine identifier. The analysis sub-circuit determines if the first software routine identifier corresponds with the second software routine identifier. The output is coupled to at least one of the first or second processors and indicates when the first and second software routine identifiers do not correspond. One of the first and second processors is delayed until the first and second software routine identifiers correspond.