Task Processor Circuit for Multiprocessor Context Switching
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Solution Overview
Problem
In multiprocessor systems, the overhead associated with exclusive control can significantly increase, leading to reduced throughput or deteriorated performance, as existing technologies do not efficiently manage task execution across multiple CPUs.
Innovation Solution
A task processing device that implements task scheduling and exclusive control using electronic circuits, reducing overhead by employing a hardware-based approach for task switching, queue management, and interrupt processing, which allows for faster context switching and improved CPU utilization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If hardware-based task switching is implemented, then context switching speed is improved, but device complexity increases
Solution Approach 1:
The patent introduces a task control circuit as an intermediary hardware component that manages task switching between multiple CPUs. This circuit includes task queues, priority management logic, and context switching control mechanisms that mediate between the CPUs and the operating system, enabling fast hardware-based context switching while keeping the CPU designs relatively standard and manageable.
2Reliability
If exclusive control management is implemented in multiprocessor systems, then task execution safety is improved, but overhead increases
Solution Approach 1:
The task control circuit automatically manages exclusive control for multiple CPUs through self-service mechanisms. Each CPU independently interacts with the task control circuit, which automatically handles task queue management, priority arbitration, and context switching without requiring complex inter-CPU coordination protocols. This reduces overhead while maintaining execution safety through hardware-enforced task isolation.
3Productivity
If multiple CPUs are used for parallel task execution, then productivity is improved, but overhead associated with exclusive control increases
Solution Approach 1:
The patent segments the task management functionality into dedicated hardware components: separate task queues for each CPU, independent priority management units, and distributed context storage. This segmentation allows multiple CPUs to operate in parallel with minimal coordination overhead, as each CPU has its own task queue and can independently manage its execution context while the task control circuit handles high-level scheduling decisions.
Data Source
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AI summary
A plurality of tasks are processed simultaneously in a plurality of CPUs. A task control circuit is connected to the plurality of CPUs, and when executing a system call signal instruction, each CPU transmits a system call signal to the task control circuit. Upon receipt of a system call signal from a CPU 0, the task control circuit 200 refers to a processor management register, identifies a RUN-task of the CPU 0, selects a READY-task that is to be executed next, switches process data of the RUN-task and process data of the READY-task, and updates processor management information.