Task Processor Context Switching via Save Registers

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Solution Overview

Problem

Multitask operating systems face inefficiencies due to overhead associated with task switching, particularly in real-time systems where timely task execution is critical, as they often require accessing and saving context information from task control blocks, slowing down system performance.

Innovation Solution

A task processor with a processing register, execution control circuit, save registers, and task control circuit that allows for direct swapping of context information between save registers and the processing register, eliminating the need to access task control blocks, thereby facilitating high-speed task switching by loading and saving data within the processor's registers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If context information is saved and loaded from task control blocks during task switching, then task context can be preserved, but task switching overhead increases and system performance decreases

Engineering Contradiction:
Improvetask context preservationVSAvoidtask switching speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts the context information storage function from the task control block (TCB) in main memory and relocates it to save registers within the processor. By taking out the dependency on external memory structures, the system eliminates the costly memory access operations that caused task switching overhead, while still preserving the ability to save and restore task context efficiently.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent merges the context storage function with the processor architecture itself by introducing save registers that are integrated into the CPU. This combination of the context saving mechanism with the processor's internal register file eliminates the need for separate memory-based TCB structures and enables direct register-to-register context transfers during task switching.

Inventive Principle:
Principle #5Merging (Combining)

2Stability of the object's composition

If task control blocks are used to store context information, then task state can be maintained, but memory access time increases task switching duration

Engineering Contradiction:
Improvetask state maintenanceVSAvoidtask switching time
Core Design Contradiction:
Stability of the object's compositionVSLoss of time

Solution Approach 1:

The patent extracts the context information from the memory-resident task control block and places it directly in the processor's save registers. This extraction eliminates the need to access main memory during task switching, reducing the time loss associated with memory access while maintaining stable task state preservation through the register-based system.

Inventive Principle:
Principle #2Taking out (Extraction)

3Ease of operation

If conventional task switching method is used, then task management is simplified, but real-time system performance is degraded due to overhead

Engineering Contradiction:
Improvetask management simplicityVSAvoidreal-time performance
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent replaces the software-based task management mechanism (which uses memory-resident TCBs and involves complex memory access operations) with a hardware-supported register-based system. The save registers provide a direct, hardware-level context storage mechanism that simplifies the actual task switching operation while dramatically improving real-time performance by eliminating memory access bottlenecks.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS9753729B2System for selecting a task to be executed according to an output from a task control circuit
Publication Date: 2017.09.05 RENESAS ELECTRONICS CORP
  • US9753729B2 patent drawing
  • US9753729B2 patent drawing
  • US9753729B2 patent drawing

AI summary

The speed of task scheduling by a multitask OS is increased. A task processor includes a CPU, a save circuit, and a task control circuit. The CPU is provided with a processing register and an execution control circuit operative to load data from a memory into a processing register and execute a task in accordance with the data in the processing register. The save circuit is provided with a plurality of save registers respectively associated with a plurality of tasks. In executing a predetermined system call, the execution control circuit notifies the task control circuit as such. The task control circuit switches between tasks for execution upon receipt of the system call signal, by saving, in the save register associated with a task being executed, the data in the processing register, selecting a task to be executed next, and loading data in the save register associated with the selected task into the processing register.