Task-Scheduled Computing Circuits for Neural Network Idle-Time Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing computing apparatuses with neural network acceleration processing functions face inefficiencies due to sequential execution of computing tasks, leading to significant idle time and wasted resources, which limits overall resource utilization and computational efficiency.
Innovation Solution
A computing apparatus with a reading circuit, computing circuit, storage circuit, and control circuit, along with first registers configured with task configuration information, enables time-sharing data processing for seamless task scheduling, allowing immediate initiation of subsequent tasks at each processing stage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If computing tasks are executed sequentially in related technologies, then task processing is simple and circuit control is straightforward, but circuit idle time increases and resource utilization decreases
Solution Approach 1:
The patent segments the computing apparatus into multiple independent circuits (reading circuit, computing circuit, storage circuit) that can operate simultaneously on different tasks. Each circuit is assigned specific tasks from a queue, enabling parallel processing and reducing idle time while maintaining manageable complexity through modular architecture.
Solution Approach 2:
The patent implements a task queue that stores multiple computing tasks in advance before execution. The control circuit reads tasks from the queue and distributes them to different circuits, allowing tasks to be prepared and scheduled efficiently without increasing real-time processing complexity.
2Productivity
If multiple computing tasks are processed in parallel across different circuits, then resource utilization improves and idle time reduces, but control complexity and task coordination difficulty increase
Solution Approach 1:
The control circuit receives completion signals from the reading circuit, computing circuit, and storage circuit, enabling it to track task progress and coordinate subsequent task assignments. This feedback mechanism allows the system to maintain efficient parallel processing while managing coordination complexity through centralized control.
Solution Approach 2:
The control circuit acts as an intermediary between the task queue and the individual circuits, managing task distribution and coordination. It reads tasks from the queue, assigns them to appropriate circuits, and coordinates their execution, simplifying the overall system architecture while enabling parallel processing.
3Productivity
If sequential task execution is used, then circuit design is simple and control is straightforward, but computing efficiency and resource utilization are limited
Solution Approach 1:
The patent divides the computing apparatus into separate functional circuits (reading circuit, computing circuit, storage circuit), each responsible for specific operations. This segmentation enables parallel task execution and improves computational efficiency while keeping each individual circuit relatively simple in design.
Data Source
AI summary
This disclosure provides a computing apparatus, system, and method, a chip, a device, and a medium. The computing apparatus includes a reading circuit, a computing circuit, a storage circuit, a control circuit, and a plurality of first registers. At least one first register is configured with task configuration information of tasks. The control circuit reads register information respectively corresponding to the tasks one by one in a preset manner; enables the first register identified by a currently read piece of register information to output first configuration information to the reading circuit, second configuration information to the computing circuit, and third configuration information to the storage circuit; controls the reading circuits, the computing circuit, and the storage circuit to perform data reading, data operations, and data storage in a time-sharing manner based on the first configuration information, the second configuration information, and the third configuration information of the tasks.