Task Voting Architecture for Fault Detection in Safety-Critical Systems

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Fault-tolerant failsafe computer systems in safety-critical applications, such as railway systems, face challenges in validating instructions to prevent erroneous actions due to faulty components, which can lead to safety hazards.

Innovation Solution

A system that includes multiple memory buffers and comparison modules to generate voting signals based on task comparisons, with a central processing unit determining whether to de-assert a module health signal, ensuring that only valid instructions are executed by safety-critical hardware and software, and implementing a dual two-out-of-two voting architecture for redundancy and fault detection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple memory buffers and comparison modules are used to implement voting architecture, then system reliability is improved, but device complexity increases

Engineering Contradiction:
Improvesystem reliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system divides the safety-critical processing into multiple independent segments (first and second applications, first and second memory buffers, comparison modules) that operate in parallel. Each segment processes tasks independently, and the voting mechanism compares results across segments to detect faults, thereby improving reliability without requiring complete system redesign.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different functional qualities to different parts of the system: memory buffers store task data, comparison modules perform voting operations, and the central processing unit executes validated tasks. Each component has a specialized local function that contributes to overall system reliability while maintaining manageable complexity through functional differentiation.

Inventive Principle:
Principle #3Local quality

2Reliability

If task validation through voting is implemented, then safety is improved, but processing time increases

Engineering Contradiction:
ImprovesafetyVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs task validation in advance by comparing tasks across multiple applications before execution. The first and second applications generate tasks during a first clock cycle, and comparison modules validate these tasks during a second clock cycle before the central processing unit executes them. This preliminary validation ensures safety without blocking real-time operation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The voting mechanism operates periodically using clock cycles to validate tasks. The system alternates between generating tasks in the first clock cycle and comparing/validation in the second clock cycle, creating a rhythmic validation pattern that ensures safety while maintaining predictable processing timing for real-time control applications.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS9311212B2Task based voting for fault-tolerant fail safe computer systems
Publication Date: 2016.04.12 SMART EMBEDDED COMPUTING INC
  • US9311212B2 patent drawing
  • US9311212B2 patent drawing
  • US9311212B2 patent drawing

AI summary

A system includes a first application that writes a first plurality of tasks to a first memory buffer; a second memory buffer that receives a copy of the first plurality of tasks; a second application that writes a second plurality of tasks to a third memory buffer; and a fourth memory buffer that receives a copy of the second plurality of tasks. The system further includes a first comparison module that generates a first voting signal based on a first comparison between a first task and a second task. The system further includes a second comparison module that generates a second voting signal based on a second comparison between the first task and the second task. The system further includes a first central processing unit (CPU) that selectively determines whether to de-assert a module health signal based on the first voting signal and the second voting signal.