Taxonomy Comparison via Cache Segmentation
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Solution Overview
Problem
Existing methods for comparing financial taxonomies are slow, inefficient, and unreliable due to the complexity of financial models and the potential for network bottlenecks during data transmission, often resulting in system crashes and loss of comparison data.
Innovation Solution
A method involving the use of cache memory to load and compare portions of taxonomies, allowing for asynchronous processing and partial results to be displayed to the user, with a user interface that highlights changes in metrics and their definitions between two taxonomies, and utilizing a high-speed communication link to enhance comparison speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If taxonomies are downloaded from separate databases to a single computer over a network for comparison, then the comparison can be performed, but network bottlenecks are created and transmission delays occur
Solution Approach 1:
The patent divides the taxonomy comparison task into segments by loading portions of taxonomies into cache memory of multiple processors rather than downloading complete taxonomies to a single computer. This segmentation allows parallel processing of different portions simultaneously, eliminating network bottlenecks and transmission delays while maintaining comparison reliability through coordinated processing across multiple processors.
Solution Approach 2:
The patent performs preliminary actions by loading taxonomy portions into cache memory before comparison begins. This pre-loading step stores frequently accessed taxonomy data in high-speed cache memory of multiple processors, eliminating the need for repeated network downloads during comparison and thereby removing transmission delays while ensuring reliable access to comparison data.
2Reliability
If a single computer is used to compare taxonomies item-by-item, then the comparison can be completed, but the computer is prone to crashing and the process is extended
Solution Approach 1:
The patent merges multiple processors into a coordinated comparison system, each processor having its own cache memory. This combination distributes the comparison workload across multiple processing units working in parallel, preventing any single computer from becoming overloaded and crashing, while simultaneously increasing overall comparison productivity through concurrent processing of different taxonomy portions.
Solution Approach 2:
The patent transitions from a single-dimension sequential comparison on one computer to a multi-dimensional parallel comparison across multiple processors. By adding the dimension of parallel processing and distributing taxonomy portions across different processors with their own cache memory, the system achieves both reliable completion (no single point of failure) and improved productivity (simultaneous processing).
3Adaptability or versatility
If the complexity of financial models increases, then the models can describe more detailed financial conditions, but it becomes unclear how changes affect the taxonomy and model results
Solution Approach 1:
The patent implements feedback mechanisms that automatically track and report how changes in complex taxonomy portions affect model results. By loading taxonomy portions into cache memory and performing systematic comparisons, the system provides feedback on the impact of changes, making it easier to understand the effects of modifications in complex financial models while maintaining their detailed descriptive capability.
Data Source
AI summary
A system for comparing a first taxonomy and a second taxonomy. The system may comprise at least one processor having associated cache memory, a cache module and a comparison module. The cache module may be configured to load a portion of a comparison sample to the cache memory. The comparison sample may comprise a part of the first taxonomy and a part of the second taxonomy. The comparison module may be configured to cause the processor to retrieve the portion of the first comparison sample from the cache memory and compare the portion of the first comparison sample.


