TCAM Bit Encoding for Higher Routing Rule Density

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Solution Overview

Problem

Current network communication systems face inefficiencies in packet routing due to the need for large storage spaces and limited capacity in ternary content addressable memory (TCAM) devices, which restrict the number of rules that can be stored and processed effectively.

Innovation Solution

The implementation of a compression scheme that encodes value bits into position bits, allowing for reduced storage requirements and increased capacity in TCAM devices by using a combination of zero, one, and don't care bits, with selective decompression to maintain search speed, utilizing multiple memory devices and encoders to compare search keys with stored position bits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If TCAM devices are used for network packet routing, then search speed is improved, but storage capacity is limited and storage space requirements increase

Engineering Contradiction:
Improvesearch speedVSAvoidstorage capacity
Core Design Contradiction:
SpeedVSQuantity of substance

Solution Approach 1:

The patent divides the TCAM storage into multiple segments or banks, where each bank can store a subset of routing rules. This segmentation allows parallel processing of search operations across multiple banks, maintaining high search speed while effectively increasing the total storage capacity by utilizing distributed memory structures.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a new dimension to TCAM organization by implementing a hierarchical memory structure with multiple levels of caching and storage. This dimensional expansion allows the system to maintain frequently accessed routing rules in fast TCAM while storing less frequently accessed rules in slower but larger capacity memory, thereby increasing overall storage capacity without compromising search speed for critical routes.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If more routing rules are stored in TCAM, then routing versatility is improved, but storage space requirements increase

Engineering Contradiction:
Improverouting versatilityVSAvoidstorage space
Core Design Contradiction:
Adaptability or versatilityVSVolume of stationary object

Solution Approach 1:

The patent dynamically changes the parameters of TCAM storage by implementing variable compression ratios and adaptive memory allocation. Based on the characteristics of routing rules (such as prefix length and frequency of use), the system adjusts compression levels and memory allocation to maximize the number of storable rules within fixed storage space, thereby improving routing versatility without proportionally increasing storage space requirements.

Inventive Principle:
Principle #35Parameter changes

3Quantity of substance

If compression scheme is implemented to reduce storage space, then storage efficiency is improved, but device complexity increases

Engineering Contradiction:
Improvestorage efficiencyVSAvoiddevice complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent implements compression by creating simplified copies or representations of routing rules rather than storing complete rule sets. Each TCAM entry stores a compressed index or pointer that references the actual routing rule, significantly reducing storage space requirements. The complexity is managed by using standardized compression formats and efficient index structures that can be processed with minimal additional hardware logic.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS9639501B1Apparatus and methods to compress data in a network device and perform ternary content addressable memory (TCAM) processing
Publication Date: 2017.05.02 CORIGINE ELECTRONICS TECH CO LTD
  • US9639501B1 patent drawing
  • US9639501B1 patent drawing
  • US9639501B1 patent drawing

AI summary

Systems and techniques relating to processing of network communications include, according to an aspect, a network device that includes circuitry configured to receive value bits selected from a group consisting of a zero bit, a one bit, and a don't care bit; and circuitry configured to store encoded representations of the value bits for use in network packet routing, wherein the encoded representations are position bits selected from a group consisting of a zero bit and a one bit; wherein the circuitry configured to store includes a first memory location and a second memory location that each eliminate a different combination of the value bits from being available for storage respectively in the first memory location and the second memory location.